From: John Garry <john.garry@huawei.com>
To: Geetha sowjanya <gakula@caviumnetworks.com>,
<will.deacon@arm.com>, <robin.murphy@arm.com>,
<lorenzo.pieralisi@arm.com>, <hanjun.guo@linaro.org>,
<sudeep.holla@arm.com>, <iommu@lists.linux-foundation.org>
Cc: <robh@kernel.org>, <Charles.Garcia-Tobin@arm.com>,
Geetha Sowjanya <geethasowjanya.akula@cavium.com>,
<geethasowjanya.akula@gmail.com>, <jcm@redhat.com>,
<linu.cherian@cavium.com>, <rjw@rjwysocki.net>,
<robert.moore@intel.com>, <linux-kernel@vger.kernel.org>,
<linux-acpi@vger.kernel.org>, <robert.richter@cavium.com>,
<lv.zheng@intel.com>, <catalin.marinas@arm.com>,
<sgoutham@cavium.com>, <linux-arm-kernel@lists.infradead.org>,
<devel@acpica.org>, Linuxarm <linuxarm@huawei.com>
Subject: Re: [PATCH v7 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126
Date: Tue, 6 Jun 2017 12:03:59 +0100 [thread overview]
Message-ID: <17f9e235-179c-38cf-c76f-c8d2af60965f@huawei.com> (raw)
In-Reply-To: <1496145821-3411-4-git-send-email-gakula@caviumnetworks.com>
On 30/05/2017 13:03, Geetha sowjanya wrote:
> From: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
>
> Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq
separate irq lines
> lines for gerror, eventq and cmdq-sync.
>
> This patch addresses the issue by checking if any interrupt sources are
> using same irq number, then they are registered as shared irqs.
>
> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
> ---
> Documentation/arm64/silicon-errata.txt | 1 +
> drivers/iommu/arm-smmu-v3.c | 29 +++++++++++++++++++++++++----
> 2 files changed, 26 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/arm64/silicon-errata.txt b/Documentation/arm64/silicon-errata.txt
> index 4693a32..42422f6 100644
> --- a/Documentation/arm64/silicon-errata.txt
> +++ b/Documentation/arm64/silicon-errata.txt
> @@ -63,6 +63,7 @@ stable kernels.
> | Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 |
> | Cavium | ThunderX SMMUv2 | #27704 | N/A |
> | Cavium | ThunderX2 SMMUv3| #74 | N/A |
> +| Cavium | ThunderX2 SMMUv3| #126 | N/A |
> | | | | |
> | Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 |
> | | | | |
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index 4e80205..d2db01f 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -2232,6 +2232,25 @@ static void arm_smmu_setup_msis(struct arm_smmu_device *smmu)
> devm_add_action(dev, arm_smmu_free_msis, dev);
> }
>
> +static int get_irq_flags(struct arm_smmu_device *smmu, int irq)
> +{
> + int match_count = 0;
> +
> + if (irq == smmu->evtq.q.irq)
> + match_count++;
> + if (irq == smmu->cmdq.q.irq)
> + match_count++;
> + if (irq == smmu->gerr_irq)
> + match_count++;
> + if (irq == smmu->priq.q.irq)
> + match_count++;
> +
> + if (match_count > 1)
> + return IRQF_SHARED | IRQF_ONESHOT;
> +
> + return IRQF_ONESHOT;
> +}
> +
> static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
> {
> int ret, irq;
> @@ -2252,7 +2271,7 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
> if (irq) {
> ret = devm_request_threaded_irq(smmu->dev, irq, NULL,
> arm_smmu_evtq_thread,
> - IRQF_ONESHOT,
> + get_irq_flags(smmu, irq),
> "arm-smmu-v3-evtq", smmu);
> if (ret < 0)
> dev_warn(smmu->dev, "failed to enable evtq irq\n");
> @@ -2261,7 +2280,8 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
> irq = smmu->cmdq.q.irq;
> if (irq) {
> ret = devm_request_irq(smmu->dev, irq,
> - arm_smmu_cmdq_sync_handler, 0,
If it is indeed ok to change this to having IRQF_ONESHOT set now
(right?), then can you add a note to the commit message?
> + arm_smmu_cmdq_sync_handler,
> + get_irq_flags(smmu, irq),
indentation looks inconsistent
> "arm-smmu-v3-cmdq-sync", smmu);
> if (ret < 0)
> dev_warn(smmu->dev, "failed to enable cmdq-sync irq\n");
> @@ -2270,7 +2290,8 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
> irq = smmu->gerr_irq;
> if (irq) {
> ret = devm_request_irq(smmu->dev, irq, arm_smmu_gerror_handler,
> - 0, "arm-smmu-v3-gerror", smmu);
> + get_irq_flags(smmu, irq),
> + "arm-smmu-v3-gerror", smmu);
> if (ret < 0)
> dev_warn(smmu->dev, "failed to enable gerror irq\n");
> }
> @@ -2280,7 +2301,7 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
> if (irq) {
> ret = devm_request_threaded_irq(smmu->dev, irq, NULL,
> arm_smmu_priq_thread,
> - IRQF_ONESHOT,
> + get_irq_flags(smmu, irq),
> "arm-smmu-v3-priq",
> smmu);
> if (ret < 0)
>
next prev parent reply other threads:[~2017-06-06 11:06 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-30 12:03 [PATCH v7 0/3] Cavium ThunderX2 SMMUv3 errata workarounds Geetha sowjanya
2017-05-30 12:03 ` [PATCH v7 1/3] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model Geetha sowjanya
2017-06-08 8:58 ` Lorenzo Pieralisi
2017-06-09 6:00 ` Geetha Akula
2017-06-20 8:19 ` Robert Richter
2017-06-20 8:51 ` Robert Richter
2017-06-20 10:31 ` Lorenzo Pieralisi
2017-05-30 12:03 ` [PATCH v7 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74 Geetha sowjanya
2017-06-09 10:28 ` Robin Murphy
[not found] ` <CA+7sy7C_44dTy0-nAE=b5BCXmc8ACQx2O6A1jCOCsemZDD5j4w@mail.gmail.com>
2017-06-09 11:38 ` Fwd: " Jayachandran C
2017-06-09 15:43 ` Robin Murphy
2017-06-12 8:12 ` Jayachandran C
2017-05-30 12:03 ` [PATCH v7 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126 Geetha sowjanya
2017-06-06 11:03 ` John Garry [this message]
2017-06-09 10:00 ` Will Deacon
2017-05-30 14:11 ` [PATCH v7 0/3] Cavium ThunderX2 SMMUv3 errata workarounds Robert Richter
2017-06-08 16:32 ` Lorenzo Pieralisi
2017-06-08 17:13 ` Rafael J. Wysocki
2017-06-08 17:22 ` Robin Murphy
2017-06-13 11:51 ` Lorenzo Pieralisi
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