From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Linghui Wu <linghui.wu@oss.qualcomm.com>,
Bartosz Golaszewski <brgl@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Miaoqing Pan <miaoqing.pan@oss.qualcomm.com>,
Hangtian Zhu <hangtian.zhu@oss.qualcomm.com>,
linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH 0/3] power: sequencing: qcom-wcn: support SW_CTRL wake IRQ
Date: Wed, 14 Oct 2026 15:07:57 +0200 [thread overview]
Message-ID: <1807728b-2cf5-4594-b353-267f09d35548@oss.qualcomm.com> (raw)
In-Reply-To: <20261014121910.1509541-1-linghui.wu@oss.qualcomm.com>
On 10/14/26 2:19 PM, Linghui Wu wrote:
> Some WCN3990-family designs connect the SW_CTRL output to a GPIO on the
> application processor. On Shikra, the WCN3988 SW_CTRL signal is connected
> to GPIO88 and is used through the MGPI/AOSS hardware path to request the
> required RF clocks.
>
> Qualcomm downstream kernels configure this path through
> msm_gpio_mpm_wake_set(), but upstream does not provide an equivalent API.
This information is not useful to the reader who doesn't follow the
Qualcomm downstream kernels.
> This series models SW_CTRL as a dedicated wake IRQ. Requesting the GPIO IRQ
> resource enables POWER_SAVE_WAKEUP_ENABLE in Qualcomm TLMM when
> WAKEUP_PRESENT is advertised, while the PM core keeps the IRQ disabled
> during normal operation and arms it for system suspend.
This starts off good, but zooms in too much on the specifics, instead
of the functional outcome.
> This is an RFC because the intended hardware and software model still
> needs confirmation. In particular, please advise whether SW_CTRL should
> be represented as an AP wake source using dev_pm_set_dedicated_wake_irq(),
> or whether Linux only needs an interface to explicitly configure the
> TLMM/MGPI power-save path.
You threw a lot of Qualcomm TLAs at potentially non-Qualcomm reviewers,
so it's not really possible for them to give you this advice.
> The series documents the named wakeup interrupt for the WCN PMU binding,
> implements dedicated wake IRQ handling in the Qualcomm WCN power
> sequencer, and enables it on the Shikra CQM, CQS and IQS EVKs. On this
> base, CQM and CQS share shikra-cqm-som.dtsi, while IQS uses
> shikra-iqs-som.dtsi.
The second sentence brings no value.
> Testing:
> - scripts/checkpatch.pl --strict: passed
> - dt-binding-check: passed
> - dtb-check: passed
> - sparse-check: passed
> - Shikra CQM, CQS and IQS DTB builds: passed
The above cases are implicitly expected and shouldn't be listed out.
> - QIPL validation of the equivalent qcom-6.18.y implementation: passed
This is a useless test on a year-old kernel with a million patches on top
that doesn't reflect whether the change works on the target tree (which
is approximately linux-next/master). You must test your changes on the
base that you intend the patch to be applied to.
> An earlier experiment confirmed that requesting GPIO88 as an IRQ changes
> TLMM_GPIO_INTR_CFG88 from 0x942 to 0x9c2, setting
> POWER_SAVE_WAKEUP_ENABLE.
>
> Linghui Wu (3):
> dt-bindings: power: sequencing: qcom-wcn: document wakeup-source
> power: sequencing: qcom-wcn: support SW_CTRL wake IRQ
> arm64: dts: qcom: shikra: enable WCN SW_CTRL wakeup
>
> .../bindings/regulator/qcom,wcn3990-pmu.yaml | 22 ++++++++++++++
> arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi | 4 +++
> arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi | 4 +++
> drivers/power/sequencing/pwrseq-qcom-wcn.c | 30 +++++++++++++++++++
> 4 files changed, 60 insertions(+)
>
>
> base-commit: a90ee4305c4a5df72c11b31dacfdc76e00fcf78a
You must base your changes on linux-next, otherwise your base is
effectively 3 months behind the current developments.
Konrad
prev parent reply other threads:[~2026-10-14 13:08 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-14 12:19 Linghui Wu
2026-10-14 12:19 ` [RFC PATCH 1/3] dt-bindings: power: sequencing: qcom-wcn: document wakeup-source Linghui Wu
2026-10-14 12:19 ` [RFC PATCH 2/3] power: sequencing: qcom-wcn: support SW_CTRL wake IRQ Linghui Wu
2026-10-14 12:19 ` [RFC PATCH 3/3] arm64: dts: qcom: shikra: enable WCN SW_CTRL wakeup Linghui Wu
2026-10-14 12:28 ` Konrad Dybcio
2026-10-14 13:07 ` Konrad Dybcio [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1807728b-2cf5-4594-b353-267f09d35548@oss.qualcomm.com \
--to=konrad.dybcio@oss.qualcomm.com \
--cc=andersson@kernel.org \
--cc=bartosz.golaszewski@oss.qualcomm.com \
--cc=brgl@kernel.org \
--cc=broonie@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=hangtian.zhu@oss.qualcomm.com \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=lgirdwood@gmail.com \
--cc=linghui.wu@oss.qualcomm.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=miaoqing.pan@oss.qualcomm.com \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®