From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52E44CDB46E for ; Thu, 12 Oct 2023 11:55:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378933AbjJLLza (ORCPT ); Thu, 12 Oct 2023 07:55:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442949AbjJLLzF (ORCPT ); Thu, 12 Oct 2023 07:55:05 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE5E0658C; Thu, 12 Oct 2023 04:53:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697111603; x=1728647603; h=message-id:date:mime-version:subject:to:references:from: in-reply-to:content-transfer-encoding; bh=QAxAyetg73HHGlwaNyN3/g6f3UuJ6ZNcnJXJPuO59jE=; b=JqeEw8e1lPrLIr4OT1lSPdhtaMAV/WFgiqH5IS/sT/kmDGnQNieOnp0C iXdtsWFBPHuYtmVDLUTx6jIRhshfrUx+bE7FaJ8G6RtK+L9R0+EdSjl9H z9ZYQWtAqZBfN5mzfzdL097lb4MrYr+KNL64l7/5ntX7I5Vp1xXbWt1dt U2FFKzC7gEFv9ciKgCAp7xJmCbqWAnUWLQd0Upvlj1rKDH9kOdxB6S/Qe aeBA5lcIgxlbsD4u0ENcSC50dvw110BeS/ICqZRMfNYFkxCv5HHVDKQRJ f0DAIxpc9HTXv+2LV6ohzlFMBeApMoSP0R4auDpZEr3vLaDGdPsu01ZUq g==; X-IronPort-AV: E=McAfee;i="6600,9927,10860"; a="415949459" X-IronPort-AV: E=Sophos;i="6.03,218,1694761200"; d="scan'208";a="415949459" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Oct 2023 04:52:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10860"; a="870545554" X-IronPort-AV: E=Sophos;i="6.03,218,1694761200"; d="scan'208";a="870545554" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO [10.0.2.15]) ([10.252.41.84]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Oct 2023 04:52:22 -0700 Message-ID: <18273cd4-a720-4eab-a14d-f24c5f3299bb@intel.com> Date: Thu, 12 Oct 2023 14:52:20 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/7] perf intel-pt: Move PMU initialization from default config code Content-Language: en-US To: Ian Rogers , Suzuki K Poulose , Mike Leach , James Clark , Leo Yan , John Garry , Will Deacon , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Thomas Richter , Ravi Bangoria , Kajol Jain , Jing Zhang , Kan Liang , Yang Jihong , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org References: <20231007021326.4156714-1-irogers@google.com> <20231007021326.4156714-3-irogers@google.com> From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki In-Reply-To: <20231007021326.4156714-3-irogers@google.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 7/10/23 05:13, Ian Rogers wrote: > Avoid setting PMU values in intel_pt_pmu_default_config, move to > perf_pmu__arch_init. > > Signed-off-by: Ian Rogers Reviewed-by: Adrian Hunter > --- > tools/perf/arch/x86/util/intel-pt.c | 2 -- > tools/perf/arch/x86/util/pmu.c | 1 + > 2 files changed, 1 insertion(+), 2 deletions(-) > > diff --git a/tools/perf/arch/x86/util/intel-pt.c b/tools/perf/arch/x86/util/intel-pt.c > index b923bca939d9..6d6cd8f9133c 100644 > --- a/tools/perf/arch/x86/util/intel-pt.c > +++ b/tools/perf/arch/x86/util/intel-pt.c > @@ -267,8 +267,6 @@ intel_pt_pmu_default_config(struct perf_pmu *intel_pt_pmu) > > attr->config = intel_pt_default_config(intel_pt_pmu); > > - intel_pt_pmu->selectable = true; > - > return attr; > } > > diff --git a/tools/perf/arch/x86/util/pmu.c b/tools/perf/arch/x86/util/pmu.c > index 811e2377d2d5..949b3e2c67bd 100644 > --- a/tools/perf/arch/x86/util/pmu.c > +++ b/tools/perf/arch/x86/util/pmu.c > @@ -22,6 +22,7 @@ void perf_pmu__arch_init(struct perf_pmu *pmu __maybe_unused) > #ifdef HAVE_AUXTRACE_SUPPORT > if (!strcmp(pmu->name, INTEL_PT_PMU_NAME)) { > pmu->auxtrace = true; > + pmu->selectable = true; > pmu->default_config = intel_pt_pmu_default_config(pmu); > } > if (!strcmp(pmu->name, INTEL_BTS_PMU_NAME)) {