Re: [PATCH v5 3/8] dt-bindings: clock: add Qualcomm IPQ5332 NSSCC clock and reset definitions

[Krzysztof Kozlowski <krzk@kernel.org>]

On 31/08/2024 08:56, Dmitry Baryshkov wrote:
> On Sat, 31 Aug 2024 at 09:11, Krzysztof Kozlowski <krzk@kernel.org> wrote:
>>
>> On Thu, Aug 29, 2024 at 01:58:25PM +0530, Varadarajan Narayanan wrote:
>>> From: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
>>>
>>> Add NSSCC clock and reset definitions for Qualcomm IPQ5332.
>>> Enable interconnect provider ability for use by the ethernet
>>> driver.
>>>
>>> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
>>> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
>>> ---
>>> v5: Marked #power-domain-cells as false
>>>     Included #interconnect-cells
>>
>> Then this might not be GCC-like clock controller or gcc.yaml
>> should not include power-domain-cells.
> 
> qcom,gcc.yaml already doesn't mark #power-domain-cells as required, so
> it should be fine. See qcom,gcc-apq8064.yaml or qcom,gcc-ipq4019.yaml.
> 

I know, I am not saying whether code is correct or not, but whether it
makes sense. If it does not have power domains, but instead interconnect
cells, maybe it should not be considered a "GCC" like block.

Best regards,
Krzysztof