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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-647510615c0sm4352008a12.30.2025.11.28.04.57.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 28 Nov 2025 04:57:21 -0800 (PST) Message-ID: <183b845c-5fd0-44b9-8133-9741acc94cd3@oss.qualcomm.com> Date: Fri, 28 Nov 2025 13:57:18 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9 11/11] crypto: qce - Switch to using BAM DMA for crypto I/O To: Bartosz Golaszewski Cc: Vinod Koul , Jonathan Corbet , Thara Gopinath , Herbert Xu , "David S. Miller" , Udit Tiwari , Daniel Perez-Zoghbi , Md Sadre Alam , Dmitry Baryshkov , dmaengine@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, Bartosz Golaszewski References: <20251128-qcom-qce-cmd-descr-v9-0-9a5f72b89722@linaro.org> <20251128-qcom-qce-cmd-descr-v9-11-9a5f72b89722@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: DTPmXPh9nVQUjbYiI_kU3EIfnBS8qvnK X-Proofpoint-ORIG-GUID: DTPmXPh9nVQUjbYiI_kU3EIfnBS8qvnK X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTI4MDA5NCBTYWx0ZWRfXxrLJKXDo5Pnn 0LUp+q/mcmobaVjcVSWY4j8vgQDMe5QRe5/91AM+M+jmV/O+ayaoAmk5IPy0ubW91o1rf/EZJ6T tNFLZ/cIvw776AOBZBQ8T1K8HcwrkUX9djByyouGn3WkfMtCYETiBerRO+9JUyWl1XguaCH65wB 2xDxEE3vvKyYuv0hKmpJ0HOpW2URHa0c8+KcjAgt7Pg05Pd7OB7kUGNIGPOoBINPVobbpO4dZHU Aj51/uZexKhIyTnZp0LsNGffz3iDTTfx7n9bcB38Tn2AvaBT5oVZUYGAJsNnrpQvLGcW0fqlvBG WHjgPFDc/U2ImtzsQHXKjwMXIhfM+fAQy4XzRcD6C091B7pumchsp8rIIvP9ZmvoEsmo7H9MHhV vd1qwOPguqELwAdIhf4MRToJSn4BmA== X-Authority-Analysis: v=2.4 cv=BYHVE7t2 c=1 sm=1 tr=0 ts=69299c32 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=LOu_IrZLGVboqkKOeDoA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-28_03,2025-11-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 bulkscore=0 priorityscore=1501 spamscore=0 clxscore=1015 suspectscore=0 malwarescore=0 phishscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511280094 On 11/28/25 1:11 PM, Bartosz Golaszewski wrote: > On Fri, Nov 28, 2025 at 1:08 PM Konrad Dybcio > wrote: >> >> On 11/28/25 12:44 PM, Bartosz Golaszewski wrote: >>> From: Bartosz Golaszewski >>> >>> With everything else in place, we can now switch to actually using the >>> BAM DMA for register I/O with DMA engine locking. >>> >>> Signed-off-by: Bartosz Golaszewski >>> --- >> >> [...] >> >>> @@ -25,7 +26,7 @@ static inline u32 qce_read(struct qce_device *qce, u32 offset) >>> >>> static inline void qce_write(struct qce_device *qce, u32 offset, u32 val) >>> { >>> - writel(val, qce->base + offset); >>> + qce_write_dma(qce, offset, val); >>> } >> >> qce_write() seems no longer useful now >> > > I prefer to leave it like this if there are no strong objections. It > reduces the size of the final patch and also - if for any reason in > the future - we need to go back to supporting both DMA and CPU, we > could handle it here. alright Konrad