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From: Xianwei Zhao <xianwei.zhao@amlogic.com>
To: "Uwe Kleine-König" <ukleinek@kernel.org>,
	"Alexandre Mergnat" <amergnat@baylibre.com>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Kevin Hilman <khilman@baylibre.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org
Subject: Re: [PATCH v4 3/4] pwm: meson: use bulk API for per-channel clocks
Date: Wed, 11 Nov 2026 10:44:21 +0800	[thread overview]
Message-ID: <18a7edd2-354a-454b-8f9c-d66fbb0819ee@amlogic.com> (raw)
In-Reply-To: <ap8FuWnIRVgcP98G@monoceros>

Hi Uwe,
    Thanks for your review.

On 2026/9/8 02:44, Uwe Kleine-König wrote:
> 
> Hello,
> 
> On Mon, Sep 07, 2026 at 05:22:44PM +0200, Alexandre Mergnat wrote:
>>> The S4 PWM driver currently gets each channel clock individually with
>>> of_clk_get() and uses a custom cleanup action to release the clocks.
>>>
>>> Use devm_clk_bulk_get_all() instead to retrieve all per-channel clocks
>>> at once. Verify that the number of clocks matches the number of PWM
>>> channels and assign each clock to its corresponding channel.
>>>
>>> This also allows the per-channel clock initialization code to be shared
>>> by Meson PWM variants using one clock per channel.
>>>
>>> Signed-off-by: Xianwei Zhao<xianwei.zhao@amlogic.com>
>>>
>>> diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
>>> index 22cefc6d5dd0..6f151464d7cc 100644
>>> --- a/drivers/pwm/pwm-meson.c
>>> +++ b/drivers/pwm/pwm-meson.c
>>> @@ -497,33 +497,25 @@ static int meson_pwm_init_channels_meson8b_v2(struct pwm_chip *chip)
>>>   	return meson_pwm_init_clocks_meson8b(chip, mux_parent_data);
>>>   }
>>>   
>>> -static void meson_pwm_s4_put_clk(void *data)
>>> -{
>>> -	struct clk *clk = data;
>>> -
>>> -	clk_put(clk);
>>> -}
>>> -
>>> -static int meson_pwm_init_channels_s4(struct pwm_chip *chip)
>>> +static int meson_pwm_init_channels_per_channel_clk(struct pwm_chip *chip)
>>>   {
>>>   	struct device *dev = pwmchip_parent(chip);
>>> -	struct device_node *np = dev->of_node;
>>>   	struct meson_pwm *meson = to_meson_pwm(chip);
>>> -	int i, ret;
>>> +	struct clk_bulk_data *clks;
>>> +	unsigned int i;
>>> +	int num;
>>>   
>>> -	for (i = 0; i < chip->npwm; i++) {
>>> -		meson->channels[i].clk = of_clk_get(np, i);
>>> -		if (IS_ERR(meson->channels[i].clk))
>>> -			return dev_err_probe(dev,
>>> -					     PTR_ERR(meson->channels[i].clk),
>>> -					     "Failed to get clk\n");
>>> -
>>> -		ret = devm_add_action_or_reset(dev, meson_pwm_s4_put_clk,
>>> -					       meson->channels[i].clk);
>>> -		if (ret)
>>> -			return dev_err_probe(dev, ret,
>>> -					     "Failed to add clk_put action\n");
>>> -	}
>>> +	num = devm_clk_bulk_get_all(dev, &clks);
>>> +	if (num < 0)
>>> +		return dev_err_probe(dev, num, "Failed to get clocks\n");
>>> +
>>> +	if (num != chip->npwm)
>>> +		return dev_err_probe(dev, -EINVAL,
>>> +				"expected %u clocks, got %d\n",
>> Small style nit: the continuation arguments are not aligned with the open
>> parenthesis, whereas the dev_err_probe() just above and the rest of the driver
>> do align them. Can you fix it please ?
> No need to resend for that, I can fix that up while applying (after
> checking I don't have further concerns).
> 
> Thanks Alex for your review!
> 

Is there anything else I need to do before this patch can be merged?

> Best regards
> Uwe

  reply	other threads:[~2026-11-11  2:44 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-27  8:40 [PATCH v4 0/4] Add PWM support Amlogic S7 S7D S6 Xianwei Zhao via B4 Relay
2026-08-27  8:40 ` [PATCH v4 1/4] dt-bindings: pwm: amlogic: Add new bindings for S6 S7 S7D Xianwei Zhao via B4 Relay
2026-08-27  8:40 ` [PATCH v4 2/4] pwm: meson: add the PWM count driver data Xianwei Zhao via B4 Relay
2026-09-07 15:19   ` Alexandre Mergnat
2026-08-27  8:40 ` [PATCH v4 3/4] pwm: meson: use bulk API for per-channel clocks Xianwei Zhao via B4 Relay
2026-09-07 15:22   ` Alexandre Mergnat
2026-09-07 18:44     ` Uwe Kleine-König
2026-11-11  2:44       ` Xianwei Zhao [this message]
2026-08-27  8:40 ` [PATCH v4 4/4] pwm: meson: Add support for Amlogic S7 Xianwei Zhao via B4 Relay
2026-09-07 15:26   ` Alexandre Mergnat

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