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[83.9.1.37]) by smtp.gmail.com with ESMTPSA id u11-20020ac248ab000000b004dc4af9089bsm390646lfg.231.2023.04.06.12.51.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 06 Apr 2023 12:51:10 -0700 (PDT) Message-ID: <18eb5708-bf51-26c3-51a0-70a5069ffdbe@linaro.org> Date: Thu, 6 Apr 2023 21:51:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [PATCH V3 5/5] arm64: dts: qcom: ipq9574: Add cpufreq support Content-Language: en-US To: Devi Priya , agross@kernel.org, andersson@kernel.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: quic_srichara@quicinc.com, quic_sjaganat@quicinc.com, quic_kathirav@quicinc.com, quic_arajkuma@quicinc.com, quic_anusha@quicinc.com, quic_ipkumar@quicinc.com References: <20230406070032.22243-1-quic_devipriy@quicinc.com> <20230406070032.22243-6-quic_devipriy@quicinc.com> From: Konrad Dybcio In-Reply-To: <20230406070032.22243-6-quic_devipriy@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6.04.2023 09:00, Devi Priya wrote: > Add cpu freq nodes in the device tree to bump cpu frequency above 800MHz. > > Co-developed-by: Praveenkumar I > Signed-off-by: Praveenkumar I > Signed-off-by: Devi Priya > --- > Changes in V3: > - No change > > arch/arm64/boot/dts/qcom/ipq9574.dtsi | 58 +++++++++++++++++++++++++++ > 1 file changed, 58 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi > index 1f9b7529e7ed..cfef87b5fd22 100644 > --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi > @@ -6,6 +6,7 @@ > * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. > */ > > +#include > #include > #include > #include > @@ -37,6 +38,10 @@ > reg = <0x0>; > enable-method = "psci"; > next-level-cache = <&L2_0>; > + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; > + clock-names = "cpu"; > + operating-points-v2 = <&cpu_opp_table>; > + cpu-supply = <&ipq9574_s1>; > }; > > CPU1: cpu@1 { > @@ -45,6 +50,10 @@ > reg = <0x1>; > enable-method = "psci"; > next-level-cache = <&L2_0>; > + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; > + clock-names = "cpu"; > + operating-points-v2 = <&cpu_opp_table>; > + cpu-supply = <&ipq9574_s1>; > }; > > CPU2: cpu@2 { > @@ -53,6 +62,10 @@ > reg = <0x2>; > enable-method = "psci"; > next-level-cache = <&L2_0>; > + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; > + clock-names = "cpu"; > + operating-points-v2 = <&cpu_opp_table>; > + cpu-supply = <&ipq9574_s1>; > }; > > CPU3: cpu@3 { > @@ -61,6 +74,10 @@ > reg = <0x3>; > enable-method = "psci"; > next-level-cache = <&L2_0>; > + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; > + clock-names = "cpu"; > + operating-points-v2 = <&cpu_opp_table>; > + cpu-supply = <&ipq9574_s1>; > }; > > L2_0: l2-cache { > @@ -75,6 +92,47 @@ > reg = <0x0 0x40000000 0x0 0x0>; > }; > > + cpu_opp_table: opp-table-cpu { This is not sorted properly. It should probably come after memory alphabetically ('o' > 'm') Konrad > + compatible = "operating-points-v2"; > + opp-shared; > + > + opp-936000000 { > + opp-hz = /bits/ 64 <936000000>; > + opp-microvolt = <725000>; > + clock-latency-ns = <200000>; > + }; > + > + opp-1104000000 { > + opp-hz = /bits/ 64 <1104000000>; > + opp-microvolt = <787500>; > + clock-latency-ns = <200000>; > + }; > + > + opp-1416000000 { > + opp-hz = /bits/ 64 <1416000000>; > + opp-microvolt = <862500>; > + clock-latency-ns = <200000>; > + }; > + > + opp-1488000000 { > + opp-hz = /bits/ 64 <1488000000>; > + opp-microvolt = <925000>; > + clock-latency-ns = <200000>; > + }; > + > + opp-1800000000 { > + opp-hz = /bits/ 64 <1800000000>; > + opp-microvolt = <987500>; > + clock-latency-ns = <200000>; > + }; > + > + opp-2208000000 { > + opp-hz = /bits/ 64 <2208000000>; > + opp-microvolt = <1062500>; > + clock-latency-ns = <200000>; > + }; > + }; > + > firmware { > scm { > compatible = "qcom,scm-ipq9574", "qcom,scm";