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[80.56.215.227]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a72ab0651dfsm237167266b.142.2024.06.30.03.51.45 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sun, 30 Jun 2024 03:51:46 -0700 (PDT) From: Arend Van Spriel To: Stefan Wahren , , Jacobe Zang CC: , , , , , , , , , , , , , , , , , , , , , , , , , Nick Xie Date: Sun, 30 Jun 2024 12:51:44 +0200 Message-ID: <19068c5ae00.279b.9b12b7fc0a3841636cfb5e919b41b954@broadcom.com> In-Reply-To: <8e44631c-955f-42de-bb2f-f3a32c79f1c1@gmx.net> References: <20240630073605.2164346-1-jacobe.zang@wesion.com> <20240630073605.2164346-5-jacobe.zang@wesion.com> <8e44631c-955f-42de-bb2f-f3a32c79f1c1@gmx.net> User-Agent: AquaMail/1.51.5 (build: 105105504) Subject: Re: [PATCH v3 4/5] wifi: brcmfmac: Add optional lpo clock enable support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="000000000000697608061c1944c3" --000000000000697608061c1944c3 Content-Type: text/plain; format=flowed; charset="UTF-8" Content-Transfer-Encoding: 8bit On June 30, 2024 11:54:43 AM Stefan Wahren wrote: > Am 30.06.24 um 11:15 schrieb Chen-Yu Tsai: >> On Sun, Jun 30, 2024 at 5:10 PM Jacobe Zang wrote: >>> Hi Stefan, >>> >>>>> WiFi modules often require 32kHz clock to function. Add support to >>>>> enable the clock to PCIe driver. >>>> the low power clock is independent from the host interface like PCIe. So >>>> the clock handling should move to the common code. Sorry, not i cannot >>>> give a good suggestion, what's the best place for this. >>> I think the clock is used by the PCIe device so enable it in this file. >>> Also I checked >>> use of clock which in spi[0] or sdio[0] device was enabled similarly to this. >>> >>> [0] >>> https://lore.kernel.org/all/20210806081229.721731-4-claudiu.beznea@microchip.com/ >> You're looking at the wrong driver. For brcmfmac, the lpo clock is toggled >> by the MMC pwrseq code. And for the Bluetooth side (where it really matters) >> for UARTs, it is in drivers/bluetooth/hci_bcm.c. and documented in the >> binding Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml > Thanks for clarifying. So this change handles the PCIe case without > bluetooth. For USB the clock control doesn't make sense. > > Sorry for the noise So someone could end up with both wifi and bt LPO clock defined in DTS file. Not sure if that can be expressed and validated in device tree, but at the least there should be a fair warning in both binding files that there can be only one! The LPO clock matters to the chip. It is not specific to the BT part. The clock is important for the power-up cycle. The timing difference WL_REG_ON and BT_REG_ON is expressed in LPO clock cycles. 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