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Thu, 11 Jun 2026 04:27:28 -0700 (PDT) X-Received: by 2002:ac8:7f42:0:b0:517:5d21:9899 with SMTP id d75a77b69052e-517ee2161c0mr24244311cf.5.1781177247470; Thu, 11 Jun 2026 04:27:27 -0700 (PDT) Received: from [192.168.120.170] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bfd4024058dsm7715966b.38.2026.06.11.04.27.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 11 Jun 2026 04:27:26 -0700 (PDT) Message-ID: <191c4b05-7d66-4338-8321-ebc593379f73@oss.qualcomm.com> Date: Thu, 11 Jun 2026 13:27:23 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] clk: qcom: Add Audio Core clock controller support on Qualcomm Shikra SoC To: Imran Shaik , Bjorn Andersson , Michael Turquette , Stephen Boyd , Brian Masney , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20260605-shikra-audiocorecc-v1-0-7ee6b5f2d928@oss.qualcomm.com> <20260605-shikra-audiocorecc-v1-3-7ee6b5f2d928@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260605-shikra-audiocorecc-v1-3-7ee6b5f2d928@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjExMDExNCBTYWx0ZWRfX+BV2JhWo24M8 Qkn5HBx3Fg0VHR1XItAvEh6OMugCwx+wHos3VNRsz5sLEKJNaO4OJZjZMmtKnvXwHhxa+PPMjYz iTRPdvrv0OplhF0IIK+IiP2oMJHFwGh4mENgdBZMcOitnt+GxZZPjMrt90qATS1ktG8AoCn6szk 4eVcZU+fQey5LQXmwkF5fmKPXuh0LyZxzbsWply3jJeI3eg7mE16x6OjaLOgUeV7Afj6a/XO9jE gltK5VMegu6SRS93nPaBU8KAp2FqFmEtWH7gs9TCqGS+oyTbYhLafJ9YrWBenqeAO4+uQJRvjbT OJTIGtNYe1P35BwjOYTNEmQpOLqRoxlRxPD6N6ChWaFaqppHstOfu1arL6YocP2J0X53nDMFg63 jCjmNwelZFMOfDxDuoK8Owp3MifzdoAr+7Ezka7Tu4nrbAqLc1YDwoks3f5mBZQleSLt2TOt5Ne Zpg56fuy7DaybGi+b7w== X-Proofpoint-Spam-Info: AW1haW4tMjYwNjExMDExNCBTYWx0ZWRfXwb2GUz2KDndO nU9eqp1kXkzxPX4NGfx8Q34dM3EPxZ+S83Om7v/Y6cUtAj8i5AwIisTde39ai4J8jqiwzp84BcG sMgKhIHDruikkYFiv32xsNuwA66kjDo= X-Authority-Analysis: v=2.4 cv=AaiB2XXG c=1 sm=1 tr=0 ts=6a2a9ba1 cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=3t_MHGgHUfuoA-dEAxsA:9 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 X-Proofpoint-ORIG-GUID: oAKj5KTaPT8kaMw62wwwnhSeNUaBd-VV X-Proofpoint-GUID: oAKj5KTaPT8kaMw62wwwnhSeNUaBd-VV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-11_02,2026-06-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 impostorscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 adultscore=0 suspectscore=0 lowpriorityscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606040000 definitions=main-2606110114 On 6/5/26 1:26 PM, Imran Shaik wrote: > Add support for Audio Core Clock Controller (AUDIOCORECC) on Qualcomm > Shikra SoC. The AUDIOCORECC clocks and resets support differs based on > Audio subsystem enablement. In the CQM variant, both clocks and resets > are required as Audio is on APPS, while in the CQS variant only reset > control is required since Audio is handled on Modem. Handle these > requirements using variant specific compatibles. > > Signed-off-by: Imran Shaik > --- [...] > +static const struct qcom_reset_map audio_core_cc_shikra_resets[] = { > + [AUDIO_CORE_CSR_RX_SWR_CGCR] = { 0x1c }, > + [AUDIO_CORE_CSR_TX_SWR_CGCR] = { 0x30 }, So these are not "real resets", but for the sake of existing art, we can keep pretending they are bit 1 is HW_CTL (1->hw controlled) and bit 0 is taken into account only if 1 is cleared existing drivers toggle the HW_CTRL bit (meaning it's an maybe-on/surely-on switch rather than off/on).. do we need to rectify that somehow? Konrad