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From: "Nutty Liu" <liujingqi@lanxincomputing.com>
To: <zhouquan@iscas.ac.cn>, <anup@brainfault.org>,
	<ajones@ventanamicro.com>,  <atishp@atishpatra.org>,
	<paul.walmsley@sifive.com>,  <palmer@dabbelt.com>
Cc: <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
	 <kvm@vger.kernel.org>, <kvm-riscv@lists.infradead.org>
Subject: Re: [PATCH 1/5] RISC-V: KVM: Provide UAPI for Zicbop block size
Date: Fri, 20 Jun 2025 17:36:55 +0800	[thread overview]
Message-ID: <193a6972-2498-4661-8b76-4303819ca0b2@lanxincomputing.com> (raw)
In-Reply-To: <553bacc4f66e815975bb8ee0e4696397407b0a82.1750164414.git.zhouquan@iscas.ac.cn>

On 6/17/2025 9:10 PM, zhouquan@iscas.ac.cn wrote:
> From: Quan Zhou <zhouquan@iscas.ac.cn>
>
> We're about to allow guests to use the Zicbop extension.
> KVM userspace needs to know the cache block size in order to
> properly advertise it to the guest. Provide a virtual config
> register for userspace to get it with the GET_ONE_REG API, but
> setting it cannot be supported, so disallow SET_ONE_REG.
>
> Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
> ---
>   arch/riscv/include/uapi/asm/kvm.h |  1 +
>   arch/riscv/kvm/vcpu_onereg.c      | 11 +++++++++++
>   2 files changed, 12 insertions(+)
>
> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
> index 5f59fd226cc5..0863ca178066 100644
> --- a/arch/riscv/include/uapi/asm/kvm.h
> +++ b/arch/riscv/include/uapi/asm/kvm.h
> @@ -55,6 +55,7 @@ struct kvm_riscv_config {
>   	unsigned long mimpid;
>   	unsigned long zicboz_block_size;
>   	unsigned long satp_mode;
> +	unsigned long zicbop_block_size;
>   };
>   
>   /* CORE registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
> index 2e1b646f0d61..b08a22eaa7a7 100644
> --- a/arch/riscv/kvm/vcpu_onereg.c
> +++ b/arch/riscv/kvm/vcpu_onereg.c
> @@ -256,6 +256,11 @@ static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu,
>   			return -ENOENT;
>   		reg_val = riscv_cboz_block_size;
>   		break;
> +	case KVM_REG_RISCV_CONFIG_REG(zicbop_block_size):
> +		if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOP))
> +			return -ENOENT;
> +		reg_val = riscv_cbop_block_size;
> +		break;
>   	case KVM_REG_RISCV_CONFIG_REG(mvendorid):
>   		reg_val = vcpu->arch.mvendorid;
>   		break;
> @@ -347,6 +352,12 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
>   		if (reg_val != riscv_cboz_block_size)
>   			return -EINVAL;
>   		break;
> +	case KVM_REG_RISCV_CONFIG_REG(zicbop_block_size):
> +		if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOP))
> +			return -ENOENT;
> +		if (reg_val != riscv_cbop_block_size)

Seems "riscv_cbop_block_size" has not been declared.
Otherwise,
Reviewed-by: Nutty Liu<liujingqi@lanxincomputing.com>

Thanks,
Nutty

> +			return -EINVAL;
> +		break;
>   	case KVM_REG_RISCV_CONFIG_REG(mvendorid):
>   		if (reg_val == vcpu->arch.mvendorid)
>   			break;

  reply	other threads:[~2025-06-20  9:49 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-17 13:10 [PATCH 0/5] RISC-V: KVM: Allow zicop/bfloat16 exts for guest zhouquan
2025-06-17 13:10 ` [PATCH 1/5] RISC-V: KVM: Provide UAPI for Zicbop block size zhouquan
2025-06-20  9:36   ` Nutty Liu [this message]
2025-06-24 13:45   ` Andrew Jones
2025-06-17 13:10 ` [PATCH 2/5] RISC-V: KVM: Allow Zicbop extension for Guest/VM zhouquan
2025-06-20  9:40   ` Nutty Liu
2025-06-24 13:46   ` Andrew Jones
2025-06-17 13:10 ` [PATCH 3/5] RISC-V: KVM: Allow bfloat16 " zhouquan
2025-06-20  9:49   ` Nutty Liu
2025-06-24 13:46   ` Andrew Jones
2025-06-17 13:10 ` [PATCH 4/5] KVM: riscv: selftests: Add Zicbop extension to get-reg-list test zhouquan
2025-06-20  9:58   ` Nutty Liu
2025-06-24 13:47   ` Andrew Jones
2025-06-17 13:10 ` [PATCH 5/5] KVM: riscv: selftests: Add bfloat16 " zhouquan
2025-06-20  9:58   ` Nutty Liu
2025-06-24 13:47   ` Andrew Jones
2025-07-17 12:04 ` [PATCH 0/5] RISC-V: KVM: Allow zicop/bfloat16 exts for guest Anup Patel

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