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([2a01:e0a:e17:9700:16d2:7456:6634:9626]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-395c83b6a32sm5420094f8f.33.2025.03.14.04.44.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 14 Mar 2025 04:44:06 -0700 (PDT) Message-ID: <1942580f-cd67-4ddd-b489-0532f95c1ef2@rivosinc.com> Date: Fri, 14 Mar 2025 12:44:05 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 05/17] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing To: Andrew Jones Cc: Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Shuah Khan , Jonathan Corbet , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, Samuel Holland References: <20250310151229.2365992-1-cleger@rivosinc.com> <20250310151229.2365992-6-cleger@rivosinc.com> <20250313-311b94f9bafe73bcd41158a1@orel> Content-Language: en-US From: =?UTF-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= In-Reply-To: <20250313-311b94f9bafe73bcd41158a1@orel> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 13/03/2025 13:57, Andrew Jones wrote: > On Mon, Mar 10, 2025 at 04:12:12PM +0100, Clément Léger wrote: >> schedule_on_each_cpu() was used without any good reason while documented >> as very slow. This call was in the boot path, so better use >> on_each_cpu() for scalar misaligned checking. Vector misaligned check >> still needs to use schedule_on_each_cpu() since it requires irqs to be >> enabled but that's less of a problem since this code is ran in a kthread. >> Add a comment to explicit that. >> >> Signed-off-by: Clément Léger >> --- >> arch/riscv/kernel/traps_misaligned.c | 9 +++++++-- >> 1 file changed, 7 insertions(+), 2 deletions(-) >> >> diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c >> index 90ac74191357..ffac424faa88 100644 >> --- a/arch/riscv/kernel/traps_misaligned.c >> +++ b/arch/riscv/kernel/traps_misaligned.c >> @@ -616,6 +616,11 @@ bool check_vector_unaligned_access_emulated_all_cpus(void) >> return false; >> } >> >> + /* >> + * While being documented as very slow, schedule_on_each_cpu() is used >> + * since kernel_vector_begin() expects irqs to be enabled or it will panic(). > > which expects Hum that would yield the following: "schedule_on_each_cpu() is used since kernel_vector_begin() that is called inside the vector code 'which' expects irqs to be enabled or it will panic()." which seems wrong as well. I guess something like this would be better: "While being documented as very slow, schedule_on_each_cpu() is used since kernel_vector_begin() expects irqs to be enabled or it will panic()" Thanks, Clément > >> + */ >> schedule_on_each_cpu(check_vector_unaligned_access_emulated); >> >> for_each_online_cpu(cpu) >> @@ -636,7 +641,7 @@ bool check_vector_unaligned_access_emulated_all_cpus(void) >> >> static bool unaligned_ctl __read_mostly; >> >> -static void check_unaligned_access_emulated(struct work_struct *work __always_unused) >> +static void check_unaligned_access_emulated(void *arg __always_unused) >> { >> int cpu = smp_processor_id(); >> long *mas_ptr = per_cpu_ptr(&misaligned_access_speed, cpu); >> @@ -677,7 +682,7 @@ bool check_unaligned_access_emulated_all_cpus(void) >> * accesses emulated since tasks requesting such control can run on any >> * CPU. >> */ >> - schedule_on_each_cpu(check_unaligned_access_emulated); >> + on_each_cpu(check_unaligned_access_emulated, NULL, 1); >> >> for_each_online_cpu(cpu) >> if (per_cpu(misaligned_access_speed, cpu) >> -- >> 2.47.2 >> > > Reviewed-by: Andrew Jones