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Wed, 19 Mar 2025 19:03:02 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 52JJ310U018766 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 19 Mar 2025 19:03:01 GMT Received: from [10.71.113.245] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 19 Mar 2025 12:03:00 -0700 Message-ID: <1956a94e-b231-4458-a1c1-6d9f158da669@quicinc.com> Date: Wed, 19 Mar 2025 12:03:00 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 6/9] phy: qcom: Add M31 based eUSB2 PHY driver To: Konrad Dybcio , Melody Olvera , Vinod Koul , "Kishon Vijay Abraham I" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , "Greg Kroah-Hartman" , Philipp Zabel , Bjorn Andersson , "Konrad Dybcio" , Catalin Marinas , Will Deacon CC: , , , , , References: <20250304-sm8750_usb_master-v2-0-a698a2e68e06@quicinc.com> <20250304-sm8750_usb_master-v2-6-a698a2e68e06@quicinc.com> <69fa7f33-e957-4dac-93dc-6fd40167873c@oss.qualcomm.com> Content-Language: en-US From: Wesley Cheng In-Reply-To: <69fa7f33-e957-4dac-93dc-6fd40167873c@oss.qualcomm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 40-O9L515hXSB5nNt9tWOkbhv5htKeR- X-Proofpoint-GUID: 40-O9L515hXSB5nNt9tWOkbhv5htKeR- X-Authority-Analysis: v=2.4 cv=T52MT+KQ c=1 sm=1 tr=0 ts=67db14e6 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=COk6AnOGAAAA:8 a=iubiLjn9Z8zMtogwj98A:9 a=QEXdDO2ut3YA:10 a=T1PIRxOFuHhLvSGs3xkl:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-19_06,2025-03-19_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 impostorscore=0 priorityscore=1501 bulkscore=0 mlxscore=0 clxscore=1015 mlxlogscore=937 lowpriorityscore=0 phishscore=0 spamscore=0 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503190127 Hi Konrad, On 3/11/2025 4:19 AM, Konrad Dybcio wrote: > On 3/4/25 10:56 PM, Melody Olvera wrote: >> From: Wesley Cheng >> >> SM8750 utilizes an eUSB2 PHY from M31. Add the initialization >> sequences to bring it out of reset and into an operational state. This >> differs to the M31 USB driver, in that the M31 eUSB2 driver will >> require a connection to an eUSB2 repeater. This PHY driver will handle >> the initialization of the associated eUSB2 repeater when required. >> >> Signed-off-by: Wesley Cheng >> Signed-off-by: Melody Olvera >> --- > > [...] > >> +static int msm_m31_eusb2_write_readback(void __iomem *base, u32 offset, >> + const u32 mask, u32 val) >> +{ >> + u32 write_val; >> + u32 tmp; >> + >> + tmp = readl_relaxed(base + offset); >> + tmp &= ~mask; >> + write_val = tmp | val; >> + >> + writel_relaxed(write_val, base + offset); >> + >> + tmp = readl_relaxed(base + offset); >> + tmp &= mask; >> + >> + if (tmp != val) { >> + pr_err("write: %x to offset: %x FAILED\n", val, offset); >> + return -EINVAL; >> + } >> + >> + return 0; > > Is there a reason we need to read back every write? > > Does this have to do with some funny write buffering? > Probably because its just a form of write synchronization, since we're using the relaxed variants. If desired I can switch to just using writel and remove the readback. Thanks Wesley Cheng