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([2620:15c:211:201:5099:ad7c:6c1:9570]) by smtp.gmail.com with ESMTPSA id p8-20020a1709026b8800b001a04ff0e2eesm8757180plk.58.2023.04.25.17.04.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 25 Apr 2023 17:04:15 -0700 (PDT) Message-ID: <19a823d9-d4b0-3c62-38a0-b54dc3937ab3@acm.org> Date: Tue, 25 Apr 2023 17:04:13 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [PATCH v2 1/5] ufs: mcq: Add supporting functions for mcq abort Content-Language: en-US To: "Bao D. Nguyen" , quic_asutoshd@quicinc.com, quic_cang@quicinc.com, mani@kernel.org, Powen.Kao@mediatek.com, stanley.chu@mediatek.com, adrian.hunter@intel.com, beanhuo@micron.com, avri.altman@wdc.com, martin.petersen@oracle.com Cc: linux-scsi@vger.kernel.org, Alim Akhtar , "James E.J. Bottomley" , Arthur Simchaev , Eric Biggers , open list References: <382670235be85aaa7b7dc407bcf378483ac03562.1681764704.git.quic_nguyenb@quicinc.com> From: Bart Van Assche In-Reply-To: <382670235be85aaa7b7dc407bcf378483ac03562.1681764704.git.quic_nguyenb@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 4/17/23 14:05, Bao D. Nguyen wrote: > +/* Max mcq register polling time in milisecond unit */ A nit: please change "millisecond unit" into "milliseconds". > +static int ufshcd_mcq_poll_register(void __iomem *reg, u32 mask, > + u32 val, unsigned long timeout_ms) > +{ > + unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); > + int err = 0; > + > + /* ignore bits that we don't intend to wait on */ > + val = val & mask; > + > + while ((readl(reg) & mask) != val) { & has a higher precedence than != so one pair of parentheses can be left out. > + udelay(20); > + if (time_after(jiffies, timeout)) { Please use time_is_before_jiffies() instead of time_after(jiffies, ...). > + err = -ETIMEDOUT; > + break; > + } > + } > + > + return err; > +} Please remove the variable 'err' and return the return value directly. > + > +static int ufshcd_mcq_sq_stop(struct ufs_hba *hba, struct ufs_hw_queue *hwq) > +{ > + void __iomem *reg; > + u32 i = hwq->id; Please use another variable name than 'i' for a hardware queue ID ('id'?). > + u32 i = hwq->id; Same comment here. > +/** > + * ufshcd_mcq_sq_cleanup - Clean up Submission Queue resources A nit: please use lower case text for "submission queue" and also in the comments below ("Clean up" -> "clean up"). > + spin_lock(&hwq->sq_lock); > + > + /* stop the SQ fetching before working on it */ > + err = ufshcd_mcq_sq_stop(hba, hwq); > + if (err) > + goto unlock; No spin locks around delay loops please. Is there anything that prevents to change sq_lock from a spin lock into a mutex? > +static u64 ufshcd_mcq_get_cmd_desc_addr(struct ufs_hba *hba, > + int task_tag) > +{ > + struct ufshcd_lrb *lrbp = &hba->lrb[task_tag]; > + __le32 hi = lrbp->utr_descriptor_ptr->command_desc_base_addr_hi; > + __le32 lo = lrbp->utr_descriptor_ptr->command_desc_base_addr_lo; > + > + return le64_to_cpu((__le64)hi << 32 | lo); > +} Please add a new patch at the head of this series that modifies struct utp_transfer_req_desc such that command_desc_base_addr_lo and command_desc_base_addr_hi are combined into a single __le64 variable. > +/** > + * ufshcd_mcq_nullify_cmd - Nullify utrd. Host controller does not fetch > + * transfer with Command Type = 0xF. post the Completion Queue with OCS=ABORTED. > + * @hba - per adapter instance. > + * @hwq - Hardware Queue of the nullified utrd. > + */ > +static void ufshcd_mcq_nullify_cmd(struct ufs_hba *hba, struct ufs_hw_queue *hwq) > +{ > + struct utp_transfer_req_desc *utrd; > + u32 dword_0; > + > + utrd = (struct utp_transfer_req_desc *)(hwq->sqe_base_addr + > + hwq->id * sizeof(struct utp_transfer_req_desc)); Please double check this function. It has "cmd" in the function name but none of the arguments passed to this function allows to uniquely identify a command. Is an argument perhaps missing from this function? Additionally, hwq->sqe_base_addr points to an array of SQE entries. I do not understand why hwq->id * sizeof(struct utp_transfer_req_desc) is added to that base address. Please clarify. > + utrd = (struct utp_transfer_req_desc *)(hwq->sqe_base_addr + > + sq_head_slot * sizeof(struct utp_transfer_req_desc)); hwq->sqe_base_addr already has type struct utp_transfer_req_desc * so the " * sizeof(struct utp_transfer_req_desc)" part looks wrong to me. > diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c > index 35a3bd9..808387c 100644 > --- a/drivers/ufs/core/ufshcd.c > +++ b/drivers/ufs/core/ufshcd.c > @@ -56,7 +56,6 @@ > #define NOP_OUT_RETRIES 10 > /* Timeout after 50 msecs if NOP OUT hangs without response */ > #define NOP_OUT_TIMEOUT 50 /* msecs */ > - > /* Query request retries */ > #define QUERY_REQ_RETRIES 3 > /* Query request timeout */ Is the above change really necessary? > @@ -173,7 +172,6 @@ EXPORT_SYMBOL_GPL(ufshcd_dump_regs); > enum { > UFSHCD_MAX_CHANNEL = 0, > UFSHCD_MAX_ID = 1, > - UFSHCD_NUM_RESERVED = 1, > UFSHCD_CMD_PER_LUN = 32 - UFSHCD_NUM_RESERVED, > UFSHCD_CAN_QUEUE = 32 - UFSHCD_NUM_RESERVED, > }; Same question here - is this change really necessary? Thanks, Bart.