From: Abhinav Kumar <quic_abhinavk@quicinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
<freedreno@lists.freedesktop.org>,
Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
"David Airlie" <airlied@gmail.com>,
Daniel Vetter <daniel@ffwll.ch>,
Kalyan Thota <quic_kalyant@quicinc.com>
Cc: <dri-devel@lists.freedesktop.org>, <quic_jesszhan@quicinc.com>,
<quic_parellan@quicinc.com>, <nespera@igalia.com>,
Rob Clark <robdclark@chromium.org>,
<linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] drm/msm/dpu: change _dpu_plane_calc_bw() to use u64 to avoid overflow
Date: Thu, 7 Sep 2023 17:52:44 -0700 [thread overview]
Message-ID: <19aa1b04-e136-2e19-785d-a7856f4e8e41@quicinc.com> (raw)
In-Reply-To: <f110b0fa-f41f-47e8-a83b-30de2f2b128c@linaro.org>
On 9/7/2023 5:35 PM, Dmitry Baryshkov wrote:
> On 08/09/2023 03:32, Abhinav Kumar wrote:
>> _dpu_plane_calc_bw() uses integer variables to calculate the bandwidth
>> used during plane bandwidth calculations. However for high resolution
>> displays this overflows easily and leads to below errors
>
> Can we move the u64 conversion closer to the place where we actually
> need it? Having u64 source width looks very strange.
>
Its this math
https://gitlab.freedesktop.org/drm/msm/-/blob/msm-next/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c#L139
which overflows.
So its not just one variable but I can even change this to u32 as that
also fixes the issue. Let me know if u32 works better.
Perhaps I went too far to go from int to u64.
>>
>> [dpu error]crtc83 failed performance check -7
>>
>> Promote the intermediate variables to u64 to avoid overflow.
>>
>> Fixes: c33b7c0389e1 ("drm/msm/dpu: add support for clk and bw scaling
>> for display")
>> Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/32
>> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
>> ---
>> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
>> b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
>> index ae970af1154f..c6193131beec 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
>> @@ -118,7 +118,7 @@ static u64 _dpu_plane_calc_bw(const struct
>> dpu_mdss_cfg *catalog,
>> const struct drm_display_mode *mode,
>> struct dpu_sw_pipe_cfg *pipe_cfg)
>> {
>> - int src_width, src_height, dst_height, fps;
>> + u64 src_width, src_height, dst_height, fps;
>> u64 plane_prefill_bw;
>> u64 plane_bw;
>> u32 hw_latency_lines;
>
next prev parent reply other threads:[~2023-09-08 0:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-08 0:32 Abhinav Kumar
2023-09-08 0:35 ` Dmitry Baryshkov
2023-09-08 0:52 ` Abhinav Kumar [this message]
2023-09-08 0:54 ` Dmitry Baryshkov
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