From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: brgerst@gmail.com, xen-devel <xen-devel@lists.xenproject.org>,
Juergen Gross <jgross@suse.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 1/2] xen/PVH: Set up GS segment for stack canary
Date: Wed, 23 May 2018 12:30:47 -0400 [thread overview]
Message-ID: <19ab48d1-333c-73fa-8586-c433b5bd7b90@oracle.com> (raw)
In-Reply-To: <5B058BA002000078001C523F@prv1-mh.provo.novell.com>
On 05/23/2018 11:41 AM, Jan Beulich wrote:
>>>> On 23.05.18 at 16:30, <boris.ostrovsky@oracle.com> wrote:
>> @@ -98,6 +101,12 @@ ENTRY(pvh_start_xen)
>> /* 64-bit entry point. */
>> .code64
>> 1:
>> + /* Set base address in stack canary descriptor. */
>> + mov $MSR_GS_BASE,%ecx
>> + mov $_pa(canary), %rax
>> + xor %rdx, %rdx
> Why rax and rdx instead of eax and edx? In the former case, the
> relocation produced might confuse whatever entity processing it
> (it'll have a sign-extended 32-bit quantity to deal with, which
> wouldn't allow representing an address in the [2Gb, 4Gb) range).
> In the latter case, while surely neither performance nor code size
> matter much here, it's still a bad precedent (people copy-and-paste
> code all the time): Zero-ing of registers should generally use the
> 32-bit forms of the insn. Gas has actually gained an optimization
> mode recently (upon request from Linus and the x86 maintainers)
> to silently "repair" such inefficiencies.
Sure, I can replace these two with 32-bit variants. If there are no
other comments I won't re-send this again.
-boris
next prev parent reply other threads:[~2018-05-23 16:27 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-23 14:30 [PATCH v5 0/2] PVH GDT fixes Boris Ostrovsky
2018-05-23 14:30 ` [PATCH v5 1/2] xen/PVH: Set up GS segment for stack canary Boris Ostrovsky
2018-05-23 15:41 ` Jan Beulich
2018-05-23 16:30 ` Boris Ostrovsky [this message]
2018-05-23 14:30 ` [PATCH v5 2/2] xen/PVH: Make GDT selectors PVH-specific Boris Ostrovsky
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