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[146.241.89.107]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38f25914d73sm20784465f8f.54.2025.02.20.03.59.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 20 Feb 2025 03:59:11 -0800 (PST) Message-ID: <1a053f30-4a13-4199-bf1f-40b729b4a146@redhat.com> Date: Thu, 20 Feb 2025 12:59:10 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [net-next PATCH v10 3/6] octeontx2-af: CN20k mbox to support AF REQ/ACK functionality To: Sai Krishna , davem@davemloft.net, edumazet@google.com, kuba@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, sgoutham@marvell.com, gakula@marvell.com, lcherian@marvell.com, jerinj@marvell.com, hkelam@marvell.com, sbhatta@marvell.com, andrew+netdev@lunn.ch, kalesh-anakkur.purayil@broadcom.com References: <20250217085257.173652-1-saikrishnag@marvell.com> <20250217085257.173652-4-saikrishnag@marvell.com> Content-Language: en-US From: Paolo Abeni In-Reply-To: <20250217085257.173652-4-saikrishnag@marvell.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 2/17/25 9:52 AM, Sai Krishna wrote: > This implementation uses separate trigger interrupts for request, > response MBOX messages against using trigger message data in CN10K. > This patch adds support for basic mbox implementation for CN20K > from AF side. > > Signed-off-by: Sunil Kovvuri Goutham > Signed-off-by: Sai Krishna > --- > .../ethernet/marvell/octeontx2/af/cn20k/api.h | 8 + > .../marvell/octeontx2/af/cn20k/mbox_init.c | 215 ++++++++++++++++++ > .../ethernet/marvell/octeontx2/af/cn20k/reg.h | 17 ++ > .../marvell/octeontx2/af/cn20k/struct.h | 25 ++ > .../net/ethernet/marvell/octeontx2/af/mbox.c | 83 ++++++- > .../net/ethernet/marvell/octeontx2/af/mbox.h | 1 + > .../net/ethernet/marvell/octeontx2/af/rvu.c | 69 ++++-- > .../net/ethernet/marvell/octeontx2/af/rvu.h | 16 +- > .../marvell/octeontx2/nic/otx2_common.c | 10 +- > .../ethernet/marvell/octeontx2/nic/otx2_pf.c | 9 +- > 10 files changed, 420 insertions(+), 33 deletions(-) > create mode 100644 drivers/net/ethernet/marvell/octeontx2/af/cn20k/struct.h > > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h > index b57bd38181aa..9436a4a4d815 100644 > --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h > +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h > @@ -15,8 +15,16 @@ struct ng_rvu { > struct qmem *pf_mbox_addr; > }; > > +struct rvu; > + A few lines above the header file rvu.h is included, the forward declararions should not be needed... > /* Mbox related APIs */ > int cn20k_rvu_mbox_init(struct rvu *rvu, int type, int num); ... otherwise this line will give warns in the previous patch. [...] > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c > index 9f145c540253..acd9e1ca6d2b 100644 > --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c > @@ -597,8 +597,7 @@ static int otx2_pfvf_mbox_init(struct otx2_nic *pf, int numvfs) > base = pci_resource_start(pf->pdev, PCI_MBOX_BAR_NUM) + > MBOX_SIZE; > else > - base = readq((void __iomem *)((u64)pf->reg_base + > - RVU_PF_VF_BAR4_ADDR)); > + base = readq((pf->reg_base + RVU_PF_VF_BAR4_ADDR)); > > hwbase = ioremap_wc(base, MBOX_SIZE * pf->total_vfs); > if (!hwbase) { > @@ -647,7 +646,7 @@ static void otx2_pfvf_mbox_destroy(struct otx2_nic *pf) > } > > if (mbox->mbox.hwbase) > - iounmap(mbox->mbox.hwbase); > + iounmap((void __iomem *)mbox->mbox.hwbase); > > otx2_mbox_destroy(&mbox->mbox); > } > @@ -1312,7 +1311,7 @@ static irqreturn_t otx2_q_intr_handler(int irq, void *data) > > /* CQ */ > for (qidx = 0; qidx < pf->qset.cq_cnt; qidx++) { > - ptr = otx2_get_regaddr(pf, NIX_LF_CQ_OP_INT); > + ptr = (__force u64 *)otx2_get_regaddr(pf, NIX_LF_CQ_OP_INT); > val = otx2_atomic64_add((qidx << 44), ptr); > > otx2_write64(pf, NIX_LF_CQ_OP_INT, (qidx << 44) | > @@ -1351,7 +1350,7 @@ static irqreturn_t otx2_q_intr_handler(int irq, void *data) > * these are fatal errors. > */ > > - ptr = otx2_get_regaddr(pf, NIX_LF_SQ_OP_INT); > + ptr = (__force u64 *)otx2_get_regaddr(pf, NIX_LF_SQ_OP_INT); > val = otx2_atomic64_add((qidx << 44), ptr); > otx2_write64(pf, NIX_LF_SQ_OP_INT, (qidx << 44) | > (val & NIX_SQINT_BITS)); All the changes here looks unrelated. I guess they fix compile warnings. Should go into a separate patch, earlier in the series. /P