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Mon, 29 Jun 2026 06:56:26 -0700 (PDT) X-Received: by 2002:a05:622a:1aa3:b0:51b:ff78:f229 with SMTP id d75a77b69052e-51bff78f4a3mr26922051cf.5.1782741386549; Mon, 29 Jun 2026 06:56:26 -0700 (PDT) Received: from [192.168.120.170] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c1256c8c643sm253823866b.52.2026.06.29.06.56.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 29 Jun 2026 06:56:25 -0700 (PDT) Message-ID: <1a0b91c6-5e17-4330-a8ab-ac14d3339024@oss.qualcomm.com> Date: Mon, 29 Jun 2026 15:56:23 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 2/3] arm64: dts: qcom: kodiak: enable inline crypto engine for SDHC To: Kuldeep Singh , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neeraj Soni References: <20260629-ice_emmc_support-v8-0-1a26e1717b85@oss.qualcomm.com> <20260629-ice_emmc_support-v8-2-1a26e1717b85@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYwNjI5MDExNSBTYWx0ZWRfX8QaboQEcnSXb LOIJqLALe728dI52vS5k8goma6vmySzHmbWdS1gLNUxZ3yPa0KbeQJiw/pfBnXw7A+Gie60CrUL 8sFdK5xkmXm9V6GHCXzl2lBy7LpZ8u8= X-Proofpoint-ORIG-GUID: pNbmBKIeOTF0hf1NNZ-E6uf9N-XidoRc X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjI5MDExNSBTYWx0ZWRfXwpPFsvtoU6oP VKkMobyoH6i0rnFgVgLOblXwqdfOkSvx85aBi7sUgSVecq4QNsTn8GBr05mHMCRv+fD1KaAiyL2 HmthyX5iyUrgPwYBH7UaQ6VsHg2xC7rJJ5AkI5k63otVoxpkH7emNPWjsv24meXsOIzEyY/gfCf LdIoifG4qnm6TpdxQmqpn8c2f0KVJel2QAIWdivNwM3r/SfQUL7pSwPCJTM4RPgk76SbiODgHZZ AFk+w7Aup9ePHlc1Ctlf5xyY2n1jzqR1QHP4pBjjHDtgP1UEXBIVWEA0oNC8sy0GqFzGlaefcOR CMQWkJtnfPpvSVZAWGazBwPiuzjr9Tf0iLwXp3+LukeOJ/xfzxeD4yx33oK/x6YtYvYB3//Rcer Ag+23QFqnvq0DOSsFS5ViPS9k3KNXgeazsjETfkB/QyLpW0R5WwsStVON8ANACHIYbuITlXZBT0 wCICCDmEOJd89i0IuPw== X-Authority-Analysis: v=2.4 cv=NZzWEWD4 c=1 sm=1 tr=0 ts=6a42798c cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=P-IC7800AAAA:8 a=EUspDBNiAAAA:8 a=JHnfRRq-H4B07R_KW4EA:9 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 a=d3PnA9EDa4IxuAV0gXij:22 X-Proofpoint-GUID: pNbmBKIeOTF0hf1NNZ-E6uf9N-XidoRc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-29_03,2026-06-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 impostorscore=0 spamscore=0 adultscore=0 suspectscore=0 clxscore=1015 bulkscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606290115 On 6/29/26 2:32 PM, Kuldeep Singh wrote: > On 29-06-2026 17:24, Konrad Dybcio wrote: >> On 6/29/26 9:35 AM, Kuldeep Singh wrote: >>> From: Neeraj Soni >>> >>> Add the dedicated ICE node for kodiak and reference it from the SDHC >>> controller via qcom,ice. >>> >>> Keep the ICE node disabled by default in kodiak.dtsi and enable it in >>> board DTS files where the corresponding SDHC node is enabled. >> >> Is there a reason to disable it in the first place? >> >> Keeping it enabled it would ensure that the core is parked >> if it was left on by the bootloader > Yes, observed an issue on kodiak Soc which supports both ufs-ice and > sdhc-ice. > > CRYPTO_INLINE_ENGINE flag can be set to m via 2 configs MMC_CRYPTO and > SCSI_UFS_CRYPTO. In default defconfig, SCSI_UFS_CRYPTO is enabled > default and hence, CRYPTO_INLINE_ENGINE is enabled irrespective of > MMC_CRYPTO state. > https://elixir.bootlin.com/linux/v7.1.2/source/arch/arm64/configs/defconfig#L1325 > https://elixir.bootlin.com/linux/v7.1.2/source/drivers/mmc/host/Kconfig#L614 > https://elixir.bootlin.com/linux/v7.1.2/source/drivers/ufs/host/Kconfig#L62 > > Kodiak Soc supporting both ufs/sdhc results in initiating both ice > instances which in turn votes the clock in driver. In general, ice clock > suspend/resume sequence is later controller by ufs/sdhc controller once > the corresponding ice instance is initialised. > > Since, qcs6490-rb3gen2(having only ufs storage) doesn't have emmc > storage but sdhc-ice DT node still probes the driver, later sdhci-msm > never takes ice instance(as sdhc_1 is disabled) but ice-clocks are > remained voted on. > > This results in an issue and hence, trying to fix it by enabling ice > only when corresponding storage controller is enabled be it ufs or sdhc. > ufs/sdhc are default disabled and enabled per DTS, hence following same > convention with ice DT nodes too. > > I am planning to update other DTs too with same change. > Suggestions are welcome! qcom_ice_probe() -> qcom_ice_create() -> devm_clk_get_optional_enabled() If we remove the _enabled suffix and put a ice_resume() in ice_get(), I believe this is no longer an issue Konrad