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Thunderbird Subject: Re: [PATCH 1/3] hwmon: spd5118: Do not fail resume on temporary I2C errors To: TINSAE TADESSE Cc: linux@roeck-us.net, linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org References: <20260110172003.13969-1-tinsaetadesse2015@gmail.com> Content-Language: en-US From: Armin Wolf In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:agqE3oTcENWS+X/7hVjyaGn6rBdBIc+MN6MZOM/qUONvWjAhQgo sFNmuPnqgH86fB9YPP8FoUi/zqJly0ArIVq9sxpbVXCWzvOijZgv6KpJUDrQOC0FM6/NwT5 pkXk+h9Z+ZFDolVL7nFxWXCfE3T5AMVTINbYPri+k5ustMSaTmhiA1aw0VNLiUpXT1ALqtG pU1ZAZzKlhA1TZoWGyHTQ== X-Spam-Flag: NO UI-OutboundReport: notjunk:1;M01:P0:6KhcLHkO3Mw=;hnJ7kLpzsrM6IxxoffMuL77y72p 9fkfWlZ6v3d2vbnuUJ5exyPGKd3gXHxDn5QSZK622uR4U14Cd2VUymZ0mYVncv2fgyfpLetoh Rl+tOJn7zoBEHIUtpPUFB6tQVzGRUkjvOLg3ZFJFcS4XDm6/LQkD+7aMH3/L/6CDizOZt2LMb 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gIcvdyO7Md/kBNznC4KBbKzGVnFRF4BH6LOVefbB8pHaiCw6TEvWMQyNmRkKLFTHGND5ZDKJN sDFpkTwSqa87SWoFNcwup5n1c7RwMXAhsNJkg+staGovCLf9MfWan1qhZOr+G7DOZCSk4e3WU CermYmW4Z6DyQBdAHhiaLSdD4n5rKQaeEUtBS2s4NcblEO3nyeyHeBZ6AF0mSRSiwBUz6tgyZ 6wsIp0Z8nR+FKF6zAP/g8smygwiW8u3EYSv5tlLlDagfNGbz5bpxC5ttCCMEJSmI8f7gbjF/i vexphP36lPpLLJXJvzx626AWKkGVwgabwYTit2c+sdt60gXuHjHgErHIsT3g== Am 12.01.26 um 12:48 schrieb TINSAE TADESSE: > On Sun, Jan 11, 2026 at 1:27=E2=80=AFAM Armin Wolf wrot= e: >> Am 10.01.26 um 18:19 schrieb Tinsae Tadesse: >> >>> SPD5118 DDR5 temperature sensors may be temporarily unavailable >>> during s2idle resume. Ignore temporary -ENXIO and -EIO errors during r= esume and allow >>> register synchronization to be retried later. >> Hi, >> >> do you know if the error is caused by the SPD5118 device itself or by t= he underlying >> i2c controller? Please also share the output of "acpidump" and the name= of the i2c >> controller used to communicate with the SPD5118. >> >>> Signed-off-by: Tinsae Tadesse >>> --- >>> drivers/hwmon/spd5118.c | 8 +++++++- >>> 1 file changed, 7 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/hwmon/spd5118.c b/drivers/hwmon/spd5118.c >>> index 5da44571b6a0..ec9f14f6e0df 100644 >>> --- a/drivers/hwmon/spd5118.c >>> +++ b/drivers/hwmon/spd5118.c >>> @@ -512,9 +512,15 @@ static int spd5118_resume(struct device *dev) >>> { >>> struct spd5118_data *data =3D dev_get_drvdata(dev); >>> struct regmap *regmap =3D data->regmap; >>> + int ret; >>> >>> regcache_cache_only(regmap, false); >>> - return regcache_sync(regmap); >>> + ret =3D regcache_sync(regmap); >>> + if(ret =3D=3D -ENXIO || ret =3D=3D -EIO) { >>> + dev_warn(dev, "SPD hub not responding on resume (%d), de= ferring init\n", ret); >>> + return 0; >>> + } >> The specification says that the SPD5118 might take up to 10ms to initia= lize its i2c interface >> after power on. Can you test if simply waiting for 10ms before syncing = the regcache solves this >> issue? >> >> Thanks, >> Armin Wolf >> >>> + return ret; >>> } >>> >>> static DEFINE_SIMPLE_DEV_PM_OPS(spd5118_pm_ops, spd5118_suspend, sp= d5118_resume); > Hi Armin, > >> Do you know if the error is caused by the SPD5118 device itself or by t= he underlying i2c controller? > The error appears to be caused by the underlying I2C controller and plat= form > power sequencing rather than by the SPD5118 device itself. > > The failure manifests as a temporary -ENXIO occurring only during s2idle > resume. The SPD5118 temperature sensor works correctly before suspend an= d > after resume once the bus becomes available again. This indicates that t= he > driver=E2=80=99s resume callback may be invoked before the I2C controlle= r or firmware > has fully re-enabled access to the SPD hub. > >> Please also share the output of "acpidump" and the name of the i2c > controller used to communicate with the SPD5118. > > I have attached the output of acpidump as requested. > The SPD5118 is connected via I2C bus 14 and accessed through the Intel > I801 SMBus controller (0000:00:1f.4), which is ACPI-managed. Interesting, the ACPI code seems to do two things when the i2c controller = suspends (aka is put into D3): 1. A unknown register 0x84 ("PMEC") is modified 2. The PCI BAR of the i2c controller is disabled Since the PCI bar is not re-enabled during resume, i suspect that either t= he firmware is buggy or that the firmware relies on the operating system to restore an= y BAR settings when resuming. I do not know how the PCI core handles suspend, so i CCed the associated m= aintainers. >> Can you test if simply waiting for 10ms before syncing the regcache sol= ves this > issue? > > I tested adding an explicit msleep(10) in spd5118_resume() before callin= g > regcache_sync(), for the I2C interface to become ready after power-on. > With this delay in place, the resume failures (-ENXIO during regcache sy= nc) > no longer occur, and repeated suspend/resume cycles are completed succes= sfully. > > However, relying on a fixed delay in the resume path is not robust and w= ould > not be suitable across platforms with different firmware and power seque= ncing. > It also still performs hardware I/O during PM resume. In this case the 10 ms delay is OK since the specification of the SPD5118 = device explicitly states that the device needs those 10ms to become operational after loosin= g power. > Additional evidence comes from running sensors, where all the temperatur= e > limit and alarm attributes fail with =E2=80=9CCan=E2=80=99t read=E2=80= =9D and temp1 reports N/A, > after adding msleep(10). All hwmon attributes (temperature input, > limits, and alarms) fail uniformly, which points to a bus-level access > failure rather than an issue with specific SPD5118 registers. Strange, what kind of error is reported then accessing those sysfs attribu= tes? Can you still access the nvmem part of the SPD5118 device? Can you also check if accessing tempX_enable works? If yes then please try= to set this attribute to "1" if it is still set to "0". Additionally, please use "i2cdump" or "i2cdetect" to check if other i2c de= vices on the same bus are also affected by this. > This supports deferring regcache synchronization and avoiding I2C transa= ctions > in the resume callback, since userspace may attempt to access hwmon > attributes before the > bus or device is ready. As already stated by Guenter, the root cause might be the i2c controller i= tself. Having this deferred regcache sync only acts as a workaround, but we strongly pre= fer having a real solution. Thanks, Armin Wolf