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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: HpwkzB-SmUtfGkyZnH7hBbA-Ldt_151C X-Proofpoint-ORIG-GUID: HpwkzB-SmUtfGkyZnH7hBbA-Ldt_151C X-Proofpoint-Spam-Info: AW1haW4tMjYwOTAxMDE0MSBTYWx0ZWRfX6VBMIZeJwLNJ jeKGEEQfX3xsDU/mk8GQD/B8VXJxVZ05Jp6xE5lAGyTjRa5AmGk4gZJun0c63g528pIc+JsBkZN EBOeVDcB7nUUn5cz3e33xJx8WZJZy38= X-Authority-Analysis: v=2.4 cv=U8eiy+ru c=1 sm=1 tr=0 ts=6a96f5ad cx=c_pps a=wuOIiItHwq1biOnFUQQHKA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=OHs8NuuX1ptjo3lIKY8A:9 a=QEXdDO2ut3YA:10 a=XD7yVLdPMpWraOa8Un9W:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTAxMDE0MSBTYWx0ZWRfXyHi2hSKbnWMd GqFzwmzPUuwPhmltOqR9GaXFZCly+l+XjyM4vyg4rFcXOsIKKoObKsqC2stG1hDyvz6o4+sjxuq IxTZZcG/T/9vewzzt0uzSerf/XtpABF2JkJMJU63/6GGUoYMKL4oRjq+5A0pB8NY82C/yO7yzPa 7fWzDBwQtshVSvjKrOIUR8q/L+diHyROgwt+GtjJAeS73HZEIIRmc2sJKxeuc5i1IZhsXD3Ky3S Tzqpb7813c7oIAS4NBeFq8bifcamdk36lXWydZlj4aGGex0yF3D0J5NrxRvKRV4KePvnKybXbMf kyZVM5n1OcdZL7YtKBi3GxpbWW1OZDKuXAaVivezJSFrMKtciM4DI/W7LdrBqaRPJqsBzXcvK+O HbGz6b+yQSMBnBvQFkutWRA9vCKZIiPp31uQoc10ZzCPqBkLgYBps4mOCAYXgtxLPwBVuBq27c/ NERutZgeLkvZ9L8KEfQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-01_04,2026-09-01_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 spamscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609010141 On 8/27/26 7:51 PM, Hardeep Sharma wrote: > Add SoC-level DTSI (qcom-kuno.dtsi) and IDP board DTS > (qcom-kuno-idp.dts) for the Qualcomm Kuno SoC. > > Peripherals included in this initial set: > - Single Cortex-A7 CPU with PSCI idle states > - RPMh RSC with clock controller, power domains, and BCM voter > - GCC (Global Clock Controller) > - TLMM pin controller (110 GPIOs) > - Interconnect (aggre-noc, cnoc-main) > - GENI UART console (QUP SE3) > - SMEM, hardware spinlocks (TCSR mutex) > > Reviewed-by: Dmitry Baryshkov > Reviewed-by: Linus Walleij > Reviewed-by: Abel Vesa > Signed-off-by: Hardeep Sharma > --- [...] > + pdc: interrupt-controller@b220000 { > + compatible = "qcom,kuno-pdc", "qcom,pdc"; > + reg = <0x0b220000 0x10000>; > + qcom,pdc-ranges = <1 148 6>, > + <9 156 2>, > + <17 164 7>; GPT reports you're missing a whole lot of entries here and that will lead to the wakeup GPIOs silently failing. An old local script suggests this map is correct instead, but please check yourself: <1 148 6>, <9 156 2>, <17 164 7>, <26 173 1>, <29 176 1>, <40 187 1>, <46 193 6>, <52 266 32>, <84 249 1>, <85 256 1>, <86 315 4>, <90 43 1>, <91 45 1>, <92 154 2>, <94 158 6>, <100 171 2>, <102 174 1>, <103 23 7>, <110 147 1>, <111 31 4>, <115 175 1>, <116 177 10>, <126 188 5>; Konrad