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Message-ID: <1a297b360707201449q73637216w81859b01ab3e5b7e@mail.gmail.com>
Date: Sat, 21 Jul 2007 01:49:07 +0400
From: "Manu Abraham" <abraham.manu@gmail.com>
To: "Roland Dreier" <rdreier@cisco.com>
Subject: Re: [PATCH 5/7] I/OAT: Add support for MSI and MSI-X
Cc: "Leech, Christopher" <christopher.leech@intel.com>,
       "Waskiewicz Jr, Peter P" <peter.p.waskiewicz.jr@intel.com>,
       "Nelson, Shannon" <shannon.nelson@intel.com>, akpm@linux-foundation.org,
       linux-kernel@vger.kernel.org, davem@davemloft.net, jeff@garzik.org,
       "Williams, Dan J" <dan.j.williams@intel.com>
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On 7/21/07, Roland Dreier <rdreier@cisco.com> wrote:
>  > In a case where you have a device that which supports MSI-X (multiple
>  > interrupts) but the device in default is in MSI mode, ie some
>  > configuration change is needed on the device. In such a case, how
>  > would one handle between MSI-X and MSI ?
>  >
>  > ie the device initially doesn't support MSI-X
>
> I don't understand the question really.  Does the PCI spec even allow
> a device to be in MSI mode by default?  Surely the OS must initialize
> the address/message before the device can generate an MSI?
>

Sorry for being not clear. What i was asking is thus:

A device that has legacy interrupts and MSI-X. I was thinking that if
MSI-X failed one should fall back to MSI mode (single message), that's
what i was assuming.

In such a case, i do enable MSI-X mode on the device, when the request
for 2 ^ n  number of messages (where messages can be a max of 32), If
the request fails one falls into a single message mode, ie MSI ?


> What device do you have in mind?


The device that i have in mind is a SAA7160.


> I guess the interesting case is a
> PCIe device that supports MSI and MSI-X but not legacy interrupts.
> However I would assume such a device would come up with both MSI and
> MSI-X disabled.
>
>  - R.
>