From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.smtpout.orange.fr (smtp-16.smtpout.orange.fr [80.12.242.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 611BA2594BF for ; Tue, 7 Jan 2025 19:06:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.12.242.16 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736276811; cv=none; b=d4ueyqTkO3KRKw6y8kwjweL51Ku6f5U8i+Hm8Jsj9tiRSZuUeuIWsOerPK9d02fnEtDTNMf6I0KGa8V8+TWbgUwSNi34XXa2e12BX5EjnJ7qLo3SGPOZrBhvwPlnheTVyKsXUEaDtb+Z+HNV48Kg2bJaU1Z1h8W8oxoDQ5sTd6o= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736276811; c=relaxed/simple; bh=sRQNhqFyhkWKrSuRapFRc2vqvcXG2qQ40ODXa+vF5ng=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=PcKNW7bzCCZDPyYgCSxt/oKDtvqA0cGjyZ6SnTsvYZPIoFDD+mKAtbyActC7wAgDCai5fmUoMHdl3AtIXM0b7quzj9Wl8ZGBhkf3eK/Kl/IlWsY8/sWvfZyQytoMTW3IWJcXXxAM5eybDsiB5vadca31xpuegHWSfYf6jXN7AuY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wanadoo.fr; spf=pass smtp.mailfrom=wanadoo.fr; dkim=pass (2048-bit key) header.d=wanadoo.fr header.i=@wanadoo.fr header.b=Io2X043I; arc=none smtp.client-ip=80.12.242.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wanadoo.fr Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wanadoo.fr Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wanadoo.fr header.i=@wanadoo.fr header.b="Io2X043I" Received: from [192.168.1.37] ([90.11.132.44]) by smtp.orange.fr with ESMTPA id VEtOtTiq8jlXXVEtRt47Vv; Tue, 07 Jan 2025 20:05:36 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=wanadoo.fr; s=t20230301; t=1736276736; bh=ozx2/5BBUUAtxVh83V/zsYd1XVfxcrehOXfFUekshoY=; h=Message-ID:Date:MIME-Version:Subject:To:From; b=Io2X043IZ/t9Rx5yRnE1mPjQame1uqQtXtvE4qJbfiN1ciBQQspiqMyuStW8ObO9L xIF8kBjXg+bQ73SHu5Sav4NB07FdukXcN4OlxbzcTJRx8VHLrDNBm42qPvk5tDJRFY d34FOlkRKhyWg+9e6o61uuWfRKDGt00jSZDQ2wNHCT7n/EiUHoI1sTZ+rKqTiV0hGa nMEBJtNWZf4mXJJWOS3euD0fqJJnRN0/fX+9VF9VRMX1KyneoIQRVl3znmH6wz3vF+ zVJiNBBZMjXy+v8CyFXAmAYc77cA3dwUoBtWRrdDraW5ksPMlbhJQlxxdq7CQ1zX5V xHOUvfH1rZ9IA== X-ME-Helo: [192.168.1.37] X-ME-Auth: bWFyaW9uLmphaWxsZXRAd2FuYWRvby5mcg== X-ME-Date: Tue, 07 Jan 2025 20:05:36 +0100 X-ME-IP: 90.11.132.44 Message-ID: <1a32d4fc-ff9c-45a5-82fb-1bd3b65df791@wanadoo.fr> Date: Tue, 7 Jan 2025 20:05:28 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] soc cache: Add framework driver for HiSilicon SoC cache To: Yushan Wang , xuwei5@hisilicon.com, yangyicong@hisilicon.com, Jonathan.Cameron@huawei.com, wangjie125@huawei.com, linux-kernel@vger.kernel.org Cc: prime.zeng@hisilicon.com, fanghao11@huawei.com, linuxarm@huawei.com References: <20250107132907.3521574-1-wangyushan12@huawei.com> <20250107132907.3521574-2-wangyushan12@huawei.com> Content-Language: en-US, fr-FR From: Christophe JAILLET In-Reply-To: <20250107132907.3521574-2-wangyushan12@huawei.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Le 07/01/2025 à 14:29, Yushan Wang a écrit : > From: Jie Wang > > HiSilicon SoC cache is comprised of multiple hardware devices, a driver > in this patch is used to provide common utilities for other drivers to > avoid redundancy. ... > +static int hisi_soc_cache_lock(int cpu, phys_addr_t addr, size_t size) > +{ > + struct hisi_soc_comp_inst *inst; > + struct list_head *head; > + int ret = -ENOMEM; > + > + guard(spinlock)(&soc_cache_devs[HISI_SOC_L3C].lock); > + > + /* Iterate L3C instances to perform operation, break loop once found. */ > + head = &soc_cache_devs[HISI_SOC_L3C].node; > + list_for_each_entry(inst, head, node) { > + if (!cpumask_test_cpu(cpu, &inst->comp->affinity_mask)) > + continue; > + ret = inst->comp->ops->do_lock(inst->comp, addr, size); > + if (ret) > + return ret; > + break; > + } > + > + list_for_each_entry(inst, head, node) { Do we need to iterate another time. Isn't "inst" already correct? If so, I guess that: ret = inst->comp->ops->poll_lock_done(inst->comp, addr, size) if (ret) return ret; could be moved at the end the previous loop to both simplify the code, and save a few cycles. > + if (!cpumask_test_cpu(cpu, &inst->comp->affinity_mask)) > + continue; > + ret = inst->comp->ops->poll_lock_done(inst->comp, addr, size); > + if (ret) > + return ret; > + break; > + } > + > + return ret; > +} > + > +static int hisi_soc_cache_unlock(int cpu, phys_addr_t addr) > +{ > + struct hisi_soc_comp_inst *inst; > + struct list_head *head; > + int ret = 0; > + > + guard(spinlock)(&soc_cache_devs[HISI_SOC_L3C].lock); > + > + /* Iterate L3C instances to perform operation, break loop once found. */ > + head = &soc_cache_devs[HISI_SOC_L3C].node; > + list_for_each_entry(inst, head, node) { > + if (!cpumask_test_cpu(cpu, &inst->comp->affinity_mask)) > + continue; > + ret = inst->comp->ops->do_unlock(inst->comp, addr); > + if (ret) > + return ret; > + break; > + } > + > + list_for_each_entry(inst, head, node) { Same as above. > + if (!cpumask_test_cpu(cpu, &inst->comp->affinity_mask)) > + continue; > + ret = inst->comp->ops->poll_unlock_done(inst->comp, addr); > + if (ret) > + return ret; > + break; > + } > + > + return ret; > +} > + > +static int hisi_soc_cache_inst_check(const struct hisi_soc_comp *comp, > + enum hisi_soc_comp_type comp_type) > +{ > + struct hisi_soc_comp_ops *ops = comp->ops; > + > + /* Different types of component could have different ops. */ > + switch (comp_type) { > + case HISI_SOC_L3C: > + if (!ops->do_lock || !ops->poll_lock_done > + || !ops->do_unlock || !ops->poll_unlock_done) I think that || should be at the end of the previous line. If I remember correctly checkpatch (maybe with --strict) complains about it. > + return -EINVAL; > + break; > + default: > + return -EINVAL; > + } > + > + return 0; > +} ... CJ