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Subject: Re: RFC: Petition Intel/AMD to add POPF_IF insn
To: =?UTF-8?Q?Christian_K=c3=b6nig?= <christian.koenig@amd.com>,
        Ingo Molnar <mingo@kernel.org>, Andy Lutomirski <luto@kernel.org>,
        Dan Williams <dan.j.williams@intel.com>,
        Alex Deucher <alexander.deucher@amd.com>,
        "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
        Vinod Koul <vinod.koul@intel.com>,
        Johannes Berg <johannes.berg@intel.com>,
        Sara Sharon <sara.sharon@intel.com>,
        Adrian Hunter <adrian.hunter@intel.com>,
        Linus Torvalds <torvalds@linux-foundation.org>
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 <64bd8281-aeb4-391b-90c6-3f5e44f0ce07@amd.com>
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From: Denys Vlasenko <dvlasenk@redhat.com>
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Date: Wed, 17 Aug 2016 20:34:50 +0200
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On 08/17/2016 07:30 PM, Christian König wrote:
>> But in my measurements POPF is not fast even in the case where restored
>> flags are not changed at all:
>>
>>                 mov     $200*1000*1000, %eax
>>                 pushf
>>                 pop     %rbx
>>                 .balign 64
>> loop:           push    %rbx
>>                 popf
>>                 dec     %eax
>>                 jnz     loop
>>
>> # perf stat -r20 ./popf_1g
>>      4,929,012,093      cycles                    #    3.412 GHz                      ( +-  0.02% )
>>        835,721,371      instructions              #    0.17  insn per cycle           ( +-  0.02% )
>>        1.446185359 seconds time elapsed                                          ( +-  0.46% )
>>
>> If I replace POPF with a pop into an unused register, I get this:
>
> You are comparing apples and bananas here.

Yes, I know. Pop into a register here is basically free.
I'd also add a STI and measure how much it takes to
enable interrupts, but unfortunately STI throws a #GP
in CPL 3.