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Tue, 21 Jul 2026 10:01:05 -0700 (PDT) X-Received: by 2002:a05:6102:3fa8:b0:73a:322d:1bb3 with SMTP id ada2fe7eead31-74abc21db84mr714165137.3.1784653265258; Tue, 21 Jul 2026 10:01:05 -0700 (PDT) Received: from [192.168.120.193] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-69f34bad7e9sm69547a12.13.2026.07.21.10.01.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 21 Jul 2026 10:01:03 -0700 (PDT) Message-ID: <1a4155a5-14f6-410c-907c-b2cd8d311bfe@oss.qualcomm.com> Date: Tue, 21 Jul 2026 19:01:00 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/3] i2c: qcom-cci: Fix CCI clock rate enforcement To: Loic Poulain Cc: Robert Foss , Andi Shyti , Wolfram Sang , Dmitry Baryshkov , Luca Weiss , linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260721-cci-clk-fix-v1-0-5eae78700da8@oss.qualcomm.com> <20260721-cci-clk-fix-v1-3-5eae78700da8@oss.qualcomm.com> <7fa30af8-884f-4302-ba88-92720bc741eb@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=I4JVgtgg c=1 sm=1 tr=0 ts=6a5fa5d4 cx=c_pps a=JIY1xp/sjQ9K5JH4t62bdg==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=hrhF-SS1B2tw-unXrEcA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=tNoRWFLymzeba-QzToBc:22 X-Proofpoint-ORIG-GUID: VSXiGLy8LTYoVEb3zzMa6r17iRFeXLqB X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIxMDE3OSBTYWx0ZWRfX01AJxKoK2kiO HQ6D+x9/GAGAQaLY2i2iuESPcMMq4gIcMDkbOjpkWyvltbe614ONH1CdNLMPQN5uG85F+HWuRgb f0gPmGZFwe/hj/BDeBqwXaLPqST/qt9zrtMeY0DzalPse+YwhepJYaDzfaQYb0Z9xdG1Wdx6hbq x99dbw8S8YPTcQ0cAd4PWo8vWgngeXYpRJdbf9N7TykBG3c5sfZ6168247T0fQjzQ9kjrTqCapN VC/TQYNFLye3sEB4speQkvPoDQR6/pX3nS272yC+/VueULJwt3Teo1+M0IqoOeDJQzxaBmel35D yEtDb8dKWyJF8WFbDezlRZYtF4zkhvaBEtd0mkwSCt8gS8akn031SNG0vDzgQ7+XXh530BSSIrb PiqD45maElqkcJ0oLFo9PdzE9P3a5zMSEwqbWj2afp/W2p94+S97jg4cdmQ+qZOW91BSbKR3D7B Bzy43SL/kmMy7L4/rbQ== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIxMDE3OSBTYWx0ZWRfX42zTDqGKYMrR hVDLQNNJIVODgshixXIWHpE3e/SuaaQ/39SfB5S3MMGoz3MdT+X9xG4wIJWJmZW6qhH7EVffQ0/ Gi6XnG2Gos8tdcbiO/lNN2IJ89ToSLM= X-Proofpoint-GUID: VSXiGLy8LTYoVEb3zzMa6r17iRFeXLqB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-21_03,2026-07-20_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 priorityscore=1501 phishscore=0 bulkscore=0 suspectscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607210179 On 7/21/26 5:41 PM, Loic Poulain wrote: > Hi Konrad, > > On Tue, Jul 21, 2026 at 5:07 PM Konrad Dybcio > wrote: >> >> On 7/21/26 4:58 PM, Loic Poulain wrote: >>> The hw_params timing values (thigh, tlow, etc.) are in CCI clock ticks >>> and were calibrated for a specific clock rate per hardware variant. If >>> the clock is running at a different rate the I2C timings will be wrong, >>> potentially violating the I2C specification. >>> >>> Rather than just warning about a mismatch, actively set the clock to the >>> expected rate at probe time. Warn if the rate could not be applied so the >>> user is informed that timings may be incorrect. >>> >>> Signed-off-by: Loic Poulain >>> --- [...] >>> + cci_clk = devm_clk_get(dev, "cci"); >>> + if (IS_ERR(cci_clk)) >>> + return dev_err_probe(dev, PTR_ERR(cci_clk), "failed to get CCI clock\n"); >>> + >>> + clk_set_rate(cci_clk, cci->data->cci_clk_rate); >>> + if (clk_get_rate(cci_clk) != cci->data->cci_clk_rate) >>> + dev_warn(dev, "CCI clock is not at expected %lu Hz\n", >>> + cci->data->cci_clk_rate); >> >> This needs to go through OPP. >> >> Feel free to take over and refresh: >> >> https://lore.kernel.org/linux-arm-msm/20250904-topic-cci_updates-v1-0-d38559692703@oss.qualcomm.com/ > > Sorry for missing your series earlier. I still think we need this > series to restore the expected clock rate information in the driver > and enforce it at probe time, right now the timing tables are > calibrated for a specific frequency and the driver has no way to > verify or correct what it gets. What I'm saying is that you need to call dev_pm_opp_set_rate() anyway, clk_set_rate() doesn't take into account the required OPPs for a frequency, and those are very low, but non-zero for CCI. Unfortunately that comes with the added headache of maintaining an OPP table for each target anyway.. Konrad