From: Andrew Jeffery <andrew@codeconstruct.com.au>
To: Potin Lai <potin.lai.pt@gmail.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
Patrick Williams <patrick@stwcx.xyz>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
Cosmo Chou <cosmo.chou@quantatw.com>,
Mike Hsieh <Mike_Hsieh@quantatw.com>,
Potin Lai <potin.lai@quantatw.com>
Subject: Re: [PATCH 1/2] ARM: dts: aspeed: sanmiguel: Add IOEXP interrupt pin settings
Date: Wed, 27 May 2026 12:49:45 +0930 [thread overview]
Message-ID: <1a6ee5e082756931f1c15677ad3f5ba0fa5bbb6a.camel@codeconstruct.com.au> (raw)
In-Reply-To: <20260523-potin-update-sanmiguel-dts-20260522-v1-1-169f5fceb5f9@quantatw.com>
Hi Potin,
On Sat, 2026-05-23 at 10:28 +0800, Potin Lai wrote:
> Kernel dmesg reports IRQ #44 being disabled due to unhandled
> interrupts from multiple PCA953x IO expanders:
>
> ```
> [ 447.047861] irq 44: nobody cared (try booting with the "irqpoll" option)
> [ 447.063124] handlers:
> [ 447.068176] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.087268] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.106344] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.125421] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.144513] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.163587] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.182663] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.201756] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.220837] Disabling IRQ #44
> ```
I've applied this, but in the future can you please rather indent log
snippets rather than use markdown code-block fences?
Cheers,
Andrew
next prev parent reply other threads:[~2026-05-27 3:19 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-23 2:28 [PATCH 0/2] ARM: dts: aspeed: sanmiguel: Update DTS file Potin Lai
2026-05-23 2:28 ` [PATCH 1/2] ARM: dts: aspeed: sanmiguel: Add IOEXP interrupt pin settings Potin Lai
2026-05-27 3:19 ` Andrew Jeffery [this message]
2026-05-23 2:28 ` [PATCH 2/2] ARM: dts: aspeed: sanmiguel: Fix the CPU_CHIPTHROT linename Potin Lai
2026-05-27 3:21 ` Andrew Jeffery
2026-05-27 3:18 ` [PATCH 0/2] ARM: dts: aspeed: sanmiguel: Update DTS file Andrew Jeffery
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