From: Dave Jiang <dave.jiang@intel.com>
To: Swarag V S <swaragvs09@gmail.com>, dan.j.williams@intel.com
Cc: jonathan.cameron@huawei.com, linux-cxl@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] cxl/pci: Fixed typo in Kconfig help text
Date: Fri, 5 Dec 2025 14:10:25 -0700 [thread overview]
Message-ID: <1a745d27-6ad4-4778-bb4f-0fcdbd1af17e@intel.com> (raw)
In-Reply-To: <20251205195524.2454-1-swaragvs09@gmail.com>
On 12/5/25 12:55 PM, Swarag V S wrote:
> The help text for CXL_PCI incorrectly uses 'Device's' (possessive)
>
> instead of 'Devices' (plural). Fixed the grammar.
>
> Signed-off-by: Swarag V S <swaragvs09@gmail.com>
Thanks Swarag!
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
> Hi Dan and CXL team,
> This is a small grammar fix for the CXL Kconfig and my first open source contribution.
> Found this small grammar typo while reading the documentation for my seminar>
> Hope it helps!
>
> drivers/cxl/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig
> index 48b7314af..78b39b3c5 100644
> --- a/drivers/cxl/Kconfig
> +++ b/drivers/cxl/Kconfig
> @@ -24,7 +24,7 @@ config CXL_PCI
> default CXL_BUS
> help
> The CXL specification defines a "CXL memory device" sub-class in the
> - PCI "memory controller" base class of devices. Device's identified by
> + PCI "memory controller" base class of devices. Devices identified by
> this class code provide support for volatile and / or persistent
> memory to be mapped into the system address map (Host-managed Device
> Memory (HDM)).
prev parent reply other threads:[~2025-12-05 21:10 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-05 19:55 Swarag V S
2025-12-05 21:09 ` dan.j.williams
2025-12-05 21:10 ` Dave Jiang [this message]
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