Re: [PATCH v2 1/1] Documentation: hyperv: Update docs for PCI pass-thru device support

[Naman Jain <namjain@linux.microsoft.com>]

On 11/5/2026 11:39 PM, Michael Kelley wrote:
> Add a section to the documentation describing the IRQ domain and IRQ chip
> hierarchy that is created for virtual PCI devices, including the
> differences on x86 and arm64, and the reasons for those differences.
> 
> In the context of the IRQ domain and chip hierarchies, describe how the
> CPU selected for effective affinity is spread across CPUs in the affinity
> masks. Again, account for the differences in x86 and arm64.
> 
> Finally, rework existing text on how MSI messages are composed. Provide
> an expanded section on the overall approach that Hyper-V takes to MSI
> messages. The section provides more context on the handling of MSI messages
> in the Hyper-V vPCI driver, and why it is structured the way it is.
> 
> Signed-off-by: Michael Kelley <mhklinux@outlook.com>
> ---
> This doc update assumes that the patch to implement effective
> affinity spreading for arm64 SPIs [1] is accepted.
> 
> [1] https://lore.kernel.org/linux-hyperv/20261101021928.52649-1-mhklinux@outlook.com/
> 

Subject to above patch going in first.
Reviewed-by: Naman Jain <namjain@linux.microsoft.com>

Thanks for addressing the comments Michael.

Regards,
Naman