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[175.34.8.244]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2c164f6cea3sm161971445ad.7.2026.06.07.21.46.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 07 Jun 2026 21:46:34 -0700 (PDT) Message-ID: <1a9e10ef-266e-43c7-8722-eb61a1af1565@redhat.com> Date: Mon, 8 Jun 2026 14:46:28 +1000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm_mpam: Fix MPAMCFG_MBW_PBM register setting To: Fenghua Yu , Ben Horgan , James Morse , Reinette Chatre , Catalin Marinas , Shaopeng Tan , Jesse Chick Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Matt Ochs References: <20260607050925.252475-1-fenghuay@nvidia.com> Content-Language: en-US From: Gavin Shan In-Reply-To: <20260607050925.252475-1-fenghuay@nvidia.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Fenghua, On 6/7/26 3:09 PM, Fenghua Yu wrote: > MPAMCFG_MBW_PBM is written from cfg if cfg has the MBW partition feature. > It is reset when cfg does not have the MBW partition feature. > > But the register handling is reversed. This may cause an incorrect > register setting. For example, during an MPAM reset, reset_cfg is > empty (no MBW partition feature set), and cfg->mbw_pbm is 0. Instead of > resetting MPAMCFG_MBW_PBM to all 1's, the current logic will set it to > cfg->mbw_pbm, which is 0. > > Fix the issue by swapping the if/else branches. > > Fixes: a1cb6577f575 ("arm_mpam: Reset when feature configuration bit unset") > Reported-by: Matt Ochs > Signed-off-by: Fenghua Yu > --- > drivers/resctrl/mpam_devices.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > The fix itself looks reasonable to me, but two questions below. Reviewed-by: Gavin Shan > diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c > index 4b93e89c2678..d8b0383cee92 100644 > --- a/drivers/resctrl/mpam_devices.c > +++ b/drivers/resctrl/mpam_devices.c > @@ -1570,9 +1570,9 @@ static void mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid, > > if (mpam_has_feature(mpam_feat_mbw_part, rprops)) { > if (mpam_has_feature(mpam_feat_mbw_part, cfg)) > - mpam_reset_msc_bitmap(msc, MPAMCFG_MBW_PBM, rprops->mbw_pbm_bits); > - else > mpam_write_partsel_reg(msc, MBW_PBM, cfg->mbw_pbm); > + else > + mpam_reset_msc_bitmap(msc, MPAMCFG_MBW_PBM, rprops->mbw_pbm_bits); > } > > if (mpam_has_feature(mpam_feat_mbw_min, rprops)) { Which machine or system where mpam_feat_mbw_part is set on RIS? As I can remember, this feature isn't available on grace-hopper. Besides, I don't think this feature is well handled at present because mpam_config::mbw_pbm is only 32-bits in length, which doesn't match with the maximal length of the bit map (4096) as documented in the spec. Thanks, Gavin