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dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; Received: from LY0PR12MB257519.namprd12.prod.outlook.com (2603:10b6:404:22b::7) by DM4PR12MB5964.namprd12.prod.outlook.com (2603:10b6:8:6b::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.569.12; Mon, 2 Nov 2026 11:21:25 +0000 Received: from LY0PR12MB257519.namprd12.prod.outlook.com ([fe80::89e:d21:20ab:ae5a]) by LY0PR12MB257519.namprd12.prod.outlook.com ([fe80::89e:d21:20ab:ae5a%5]) with mapi id 15.21.0569.011; Mon, 2 Nov 2026 11:21:24 +0000 Message-ID: <1aec47c1-2b4b-4b39-b257-3f2500cef85b@nvidia.com> Date: Mon, 2 Nov 2026 16:51:13 +0530 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 09/10] PCI: tegra194: Balance core monitor clock on failures To: Frank Li Cc: "lpieralisi@kernel.org" , "kwilczynski@kernel.org" , "mani@kernel.org" , "bhelgaas@google.com" , "linux-pci@vger.kernel.org" , "robh@kernel.org" , "thierry.reding@kernel.org" , Jon Hunter , "kishon@kernel.org" , "Frank.Li@kernel.org" , Vidya Sagar , "cassel@kernel.org" , "den@valinux.co.jp" , "marco.crivellari@suse.com" , "andriy.shevchenko@linux.intel.com" , "linux-tegra@vger.kernel.org" , "linux-kernel@vger.kernel.org" References: <20261021061349.1265704-1-mmaddireddy@nvidia.com> <20261021061349.1265704-10-mmaddireddy@nvidia.com> Content-Language: en-US X-Nvconfidentiality: public From: Manikanta Maddireddy In-Reply-To: Content-Type: text/plain; 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The enable error is also only logged, so later >> cleanup can try to disable a clock that was never enabled. >> >> Track the monitor clock state, return enable failures, and use a common >> helper on retry, remove, suspend, shutdown and host-init failure paths so >> the clock is disabled exactly when it was enabled. > > Feel like checking core_clk_m_enabled for clock is not good desgin. Do you > disable clock when linkdown? > > Frank Hi Frank, Link down is treated as error and monitor clock is not disabled during linkdown. I created this patch to address the AI bot review comments. But, I checked our internal resources and identify the correct sequence of enabling monitor clock. I will send new patchset with details explanation in commit message and new fixed sequence for monitor clock. - Manikanta -- nvpublic