From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C6CC26ED45 for ; Wed, 1 Jul 2026 13:56:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782914199; cv=none; b=e3wbbfvHVgE4iFziKNzcoM8NWHy7ME1KP0Ym9NTcejvRYdZSHxQiNwwq/z7EWKvxKZ6ZqTgUQ39XIZ0jLJ7lK1kfIlBZ3Db3Jxqiiy6KtpUq7GOMgzJoIz2A8kKgU8a3mbJa76dZCGZ9kowtXGWTK9DrceMlM3UD4f9a2XisJLc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782914199; c=relaxed/simple; bh=o+rkLbVLKlXCiVbxP8BTIEGJb2hVH9Wp4yC0nELdhMA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=gPZq4Q7WpYPwP0Qyhq2PxfaYcNU/oDwqMW+gUrEp4+pW9D4begxqMiuv55cxREaKOmw59pbWIJ55n41s2YRPHZEB8VAJi1FcZ1Z40bOa7IJSjuQotlGTIlyZZ+Y6pJ6dRD5R9uynsxES+xwv0LvvLV7cVNLJv21C09laK5ZF1KY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=LEC2+nEN; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="LEC2+nEN" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1782914199; x=1814450199; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=o+rkLbVLKlXCiVbxP8BTIEGJb2hVH9Wp4yC0nELdhMA=; b=LEC2+nENPnd1MSKrsAzOua/x78FUHjvodIv0H55hv5ZEztIHBMp2eDHw tjK1wm+nU3xpowDCsJ7sl5Tnv4PUDcMoNWBNL1UUDOPig6Wbxw7d4u6K/ trXWcOjgDyezI71lnzBCC+nMmKKViT8itPpevAkUMfW8fKv3ahEUouYqi +NYcuC+B3M/6mxMJ4jB4920u1SbCCD+GN5EIXADSne6VKIpcsjSfZfFhh wM0yKsuwkGODIDWZPg3N1DeCC08iqbz0FoDeEuYO919PlqEDi5E1I0X1i KwGnUaJevvEROI6U57ZK94MUULz2LGYM/hdziNmT51MwhgL98EllOFU+7 Q==; X-CSE-ConnectionGUID: +l8md6TdQT+C22gp3uUerg== X-CSE-MsgGUID: sMJWy9YXRg+9JE2QZy3vPA== X-IronPort-AV: E=McAfee;i="6800,10657,11833"; a="83422140" X-IronPort-AV: E=Sophos;i="6.25,141,1779174000"; d="scan'208";a="83422140" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jul 2026 06:56:38 -0700 X-CSE-ConnectionGUID: EFVpghIFRnyB4svnq09qPw== X-CSE-MsgGUID: l/Xn20euSpeWgvGBvQOZhA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,141,1779174000"; d="scan'208";a="257475214" Received: from chenyu-dev.sh.intel.com ([10.239.62.107]) by fmviesa005.fm.intel.com with ESMTP; 01 Jul 2026 06:56:34 -0700 From: Chen Yu To: tony.luck@intel.com, reinette.chatre@intel.com Cc: x86@kernel.org, linux-kernel@vger.kernel.org, tglx@kernel.org, bp@alien8.de, mingo@redhat.com, dave.hansen@linux.intel.com, hpa@zytor.com, fenghuay@nvidia.com, babu.moger@amd.com, anil.keshavamurthy@broadcom.com, chen.yu@linux.dev, Chen Yu , Hongyu Ning Subject: [PATCH v5 06/10] x86/resctrl: Replace "msr" in monitoring data identifiers Date: Wed, 1 Jul 2026 21:46:39 +0800 Message-Id: <1b1c5784dea02365b27bb81799a76bb7d789149e.1782866200.git.yu.c.chen@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Monitoring counter values are currently obtained via MSR and many identifiers involved in processing these values contain "msr" as part of their names, for example "prev_msr" and "msr_val". The ERDT ACPI table describes MMIO registers for monitoring data access. Rename "msr"-based identifiers to be interface-agnostic to support their upcoming use for MMIO-read values. No functional change. Reviewed-by: Thomas Gleixner Tested-by: Hongyu Ning Signed-off-by: Chen Yu --- v4->v5: Revise commit log per Reinette's suggestion. --- arch/x86/kernel/cpu/resctrl/internal.h | 8 +++---- arch/x86/kernel/cpu/resctrl/monitor.c | 30 +++++++++++++------------- 2 files changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index 3dab05c38003..6eb0fdea6b63 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -52,13 +52,13 @@ struct erdt_domain_info { /** * struct arch_mbm_state - values used to compute resctrl_arch_rmid_read()s * return value. - * @chunks: Total data moved (multiply by rdt_group.mon_scale to get bytes) - * @prev_msr: Value of IA32_QM_CTR last time it was read for the RMID used to - * find this struct. + * @chunks: Total data moved (multiply by rdt_group.mon_scale to get bytes) + * @prev_mon_val: Previous monitor counter value for the RMID used to + * find this struct. */ struct arch_mbm_state { u64 chunks; - u64 prev_msr; + u64 prev_mon_val; }; /* Setting bit 0 in L3_QOS_EXT_CFG enables the ABMC feature. */ diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c index 03ee6102ab07..893080e6fb9e 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -187,7 +187,7 @@ void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_l3_mon_domain *d prmid = logical_rmid_to_physical_rmid(cpu, rmid); /* Record any initial, non-zero count value. */ - __rmid_read_phys(prmid, eventid, &am->prev_msr); + __rmid_read_phys(prmid, eventid, &am->prev_mon_val); } } @@ -210,16 +210,16 @@ void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_l3_mon_domai } } -static u64 mbm_overflow_count(u64 prev_msr, u64 cur_msr, unsigned int width) +static u64 mbm_overflow_count(u64 prev_val, u64 cur_val, unsigned int width) { u64 shift = 64 - width, chunks; - chunks = (cur_msr << shift) - (prev_msr << shift); + chunks = (cur_val << shift) - (prev_val << shift); return chunks >> shift; } static u64 get_corrected_val(struct rdt_resource *r, struct rdt_l3_mon_domain *d, - u32 rmid, enum resctrl_event_id eventid, u64 msr_val) + u32 rmid, enum resctrl_event_id eventid, u64 mon_val) { struct rdt_hw_l3_mon_domain *hw_dom = resctrl_to_arch_mon_dom(d); struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); @@ -228,12 +228,12 @@ static u64 get_corrected_val(struct rdt_resource *r, struct rdt_l3_mon_domain *d am = get_arch_mbm_state(hw_dom, rmid, eventid); if (am) { - am->chunks += mbm_overflow_count(am->prev_msr, msr_val, + am->chunks += mbm_overflow_count(am->prev_mon_val, mon_val, hw_res->mbm_width); chunks = get_corrected_mbm_count(rmid, am->chunks); - am->prev_msr = msr_val; + am->prev_mon_val = mon_val; } else { - chunks = msr_val; + chunks = mon_val; } return chunks * hw_res->mon_scale; @@ -246,7 +246,7 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain_hdr *hdr, struct rdt_hw_l3_mon_domain *hw_dom; struct rdt_l3_mon_domain *d; struct arch_mbm_state *am; - u64 msr_val; + u64 mon_val; u32 prmid; int cpu; int ret; @@ -263,14 +263,14 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain_hdr *hdr, hw_dom = resctrl_to_arch_mon_dom(d); cpu = cpumask_any(&hdr->cpu_mask); prmid = logical_rmid_to_physical_rmid(cpu, rmid); - ret = __rmid_read_phys(prmid, eventid, &msr_val); + ret = __rmid_read_phys(prmid, eventid, &mon_val); if (!ret) { - *val = get_corrected_val(r, d, rmid, eventid, msr_val); + *val = get_corrected_val(r, d, rmid, eventid, mon_val); } else if (ret == -EINVAL) { am = get_arch_mbm_state(hw_dom, rmid, eventid); if (am) - am->prev_msr = 0; + am->prev_mon_val = 0; } return ret; @@ -325,7 +325,7 @@ void resctrl_arch_reset_cntr(struct rdt_resource *r, struct rdt_l3_mon_domain *d memset(am, 0, sizeof(*am)); /* Record any initial, non-zero count value. */ - __cntr_id_read(cntr_id, &am->prev_msr); + __cntr_id_read(cntr_id, &am->prev_mon_val); } } @@ -333,14 +333,14 @@ int resctrl_arch_cntr_read(struct rdt_resource *r, struct rdt_l3_mon_domain *d, u32 unused, u32 rmid, int cntr_id, enum resctrl_event_id eventid, u64 *val) { - u64 msr_val; + u64 mon_val; int ret; - ret = __cntr_id_read(cntr_id, &msr_val); + ret = __cntr_id_read(cntr_id, &mon_val); if (ret) return ret; - *val = get_corrected_val(r, d, rmid, eventid, msr_val); + *val = get_corrected_val(r, d, rmid, eventid, mon_val); return 0; } -- 2.45.2