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Tue, 29 Jul 2025 14:39:01 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 56TEd0mU012782 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 29 Jul 2025 14:39:00 GMT Received: from [10.218.7.247] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Tue, 29 Jul 2025 07:38:56 -0700 Message-ID: <1b418968-2a53-443e-8766-9d280447bb2d@quicinc.com> Date: Tue, 29 Jul 2025 20:07:33 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V1] ufs: core: Fix interrupt handling for MCQ Mode in ufshcd_intr To: Bart Van Assche , , , , , , , , , CC: , , , Palash Kambar References: <20250728225711.29273-1-quic_nitirawa@quicinc.com> Content-Language: en-US From: Nitin Rawat In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: zPQjVRaClD9MVTJ-ioqRd9_YUinhhsVe X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzI5MDExMiBTYWx0ZWRfX/8cqitGdm+dP LDsn6aUjT9k4v7+lecGVERIlS2ZHUAQfr+0S94thQ6+a1LMt6CT/nvX7/ZvY7AtlXNUZzZEmM+t sTSOkm/tUz9htpN0fUTtUzK9SQDr7eHfk6K1C5a6OC+2pn/ZTnBXDNAoT+kjCKczvA3KfvQaaK1 o+GTpQVz8j2BYQ7yH0b2czgdEj/h9ynYEBEldwoQJ0uBHB1251Qu6B3zh07YsV/X98C1txh468L Qv85+PHZfdnT9R9ikLw7x838UGmkQ9BofyiSZoDlNwvNgoGnu4pMKUiGJiJsqnpwkvEOEhesJK1 fB+6aElm5rkUnVtFlnhi8I96jBWCjvdBnlqonHcgnTOYYJ6gSpful3gZes5QnwZ5FkW3GXMRSaW 1dTOjGQOz4YihM4FHFBRA5hK285T6Egvv8eG0jPHEfOQU0z4nqXMbV6Cpv7w3GSJKmOwTYo5 X-Authority-Analysis: v=2.4 cv=HfYUTjE8 c=1 sm=1 tr=0 ts=6888dd05 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=VwQbUJbxAAAA:8 a=N54-gffFAAAA:8 a=ihll0qYU2PzsKsSyJ9QA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 X-Proofpoint-ORIG-GUID: zPQjVRaClD9MVTJ-ioqRd9_YUinhhsVe X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-29_03,2025-07-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 clxscore=1015 bulkscore=0 suspectscore=0 impostorscore=0 spamscore=0 lowpriorityscore=0 adultscore=0 mlxlogscore=999 phishscore=0 priorityscore=1501 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507290112 On 7/29/2025 5:11 AM, Bart Van Assche wrote: > On 7/28/25 3:57 PM, Nitin Rawat wrote: >> diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c >> index fd8015ed36a4..5413464d63c8 100644 >> --- a/drivers/ufs/core/ufshcd.c >> +++ b/drivers/ufs/core/ufshcd.c >> @@ -7145,14 +7145,19 @@ static irqreturn_t ufshcd_threaded_intr(int >> irq, void *__hba) >>   static irqreturn_t ufshcd_intr(int irq, void *__hba) >>   { >>       struct ufs_hba *hba = __hba; >> +    u32 intr_status, enabled_intr_status; >> >>       /* Move interrupt handling to thread when MCQ & ESI are not >> enabled */ >>       if (!hba->mcq_enabled || !hba->mcq_esi_enabled) >>           return IRQ_WAKE_THREAD; >> >> +    intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS); >> +    enabled_intr_status = intr_status & ufshcd_readl(hba, >> REG_INTERRUPT_ENABLE); >> + >> +    ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS); >> + >>       /* Directly handle interrupts since MCQ ESI handlers does the >> hard job */ >> -    return ufshcd_sl_intr(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS) & >> -                   ufshcd_readl(hba, REG_INTERRUPT_ENABLE)); >> +    return ufshcd_sl_intr(hba, enabled_intr_status); >>   } > > Hi Nitin, > > Thank you for having published this patch. It seems like we both have > been working on a fix independently and without knowing about each > other's efforts. Can you please take a look at this patch and let me > know which version you prefer? Hi Bart, I reviewed your patch and test it locally—it resolves the issue. The patch looks good. Since this path handles only UIC, TM, and error conditions with no IO for MCQ, we still check for outstanding_reqs and UTP_TRANSFER_REQ_COMPL for the error case within ufshcd_threaded_intr in the patch. In my opinion, we can skip these additional checks. Thanks, Nitin > > https://lore.kernel.org/linux-scsi/20250728212731.899429-1- > bvanassche@acm.org/ > > Thanks, > > Bart.