From: David Laight <David.Laight@ACULAB.COM>
To: 'Haris Okanovic' <harisokn@amazon.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
"linux-assembly@vger.kernel.org" <linux-assembly@vger.kernel.org>
Cc: "peterz@infradead.org" <peterz@infradead.org>
Subject: RE: [PATCH 2/3] arm64: add __READ_ONCE_EX()
Date: Mon, 8 Apr 2024 14:51:13 +0000 [thread overview]
Message-ID: <1b659ba3fa50482a8338b1a6942884cc@AcuMS.aculab.com> (raw)
In-Reply-To: <20240402014706.3969151-2-harisokn@amazon.com>
From: Haris Okanovic
> Sent: 02 April 2024 02:47
>
> Perform an exclusive load, which atomically loads a word and arms the
> execusive monitor to enable wfe() polling of an address.
>
> Adding this macro in preparation for an arm64 cpuidle driver which
> supports a wfe() based polling state.
>
> https://developer.arm.com/documentation/dht0008/a/arm-synchronization-primitives/exclusive-
> accesses/exclusive-monitors
>
> Signed-off-by: Haris Okanovic <harisokn@amazon.com>
> ---
> arch/arm64/include/asm/readex.h | 46 +++++++++++++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
> create mode 100644 arch/arm64/include/asm/readex.h
>
> diff --git a/arch/arm64/include/asm/readex.h b/arch/arm64/include/asm/readex.h
> new file mode 100644
> index 000000000000..51963c3107e1
> --- /dev/null
> +++ b/arch/arm64/include/asm/readex.h
> @@ -0,0 +1,46 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Based on arch/arm64/include/asm/rwonce.h
> + *
> + * Copyright (C) 2020 Google LLC.
> + * Copyright (C) 2024 Amazon.com, Inc. or its affiliates.
> + */
> +
> +#ifndef __ASM_READEX_H
> +#define __ASM_READEX_H
> +
> +#define __LOAD_EX(sfx, regs...) "ldaxr" #sfx "\t" #regs
> +
> +#define __READ_ONCE_EX(x) \
> +({ \
> + typeof(&(x)) __x = &(x); \
> + int atomic = 1; \
> + union { __unqual_scalar_typeof(*__x) __val; char __c[1]; } __u; \
> + switch (sizeof(x)) { \
> + case 1: \
> + asm volatile(__LOAD_EX(b, %w0, %1) \
> + : "=r" (*(__u8 *)__u.__c) \
> + : "Q" (*__x) : "memory"); \
> + break; \
> + case 2: \
> + asm volatile(__LOAD_EX(h, %w0, %1) \
> + : "=r" (*(__u16 *)__u.__c) \
> + : "Q" (*__x) : "memory"); \
> + break; \
> + case 4: \
> + asm volatile(__LOAD_EX(, %w0, %1) \
> + : "=r" (*(__u32 *)__u.__c) \
> + : "Q" (*__x) : "memory"); \
> + break; \
> + case 8: \
> + asm volatile(__LOAD_EX(, %0, %1) \
> + : "=r" (*(__u64 *)__u.__c) \
> + : "Q" (*__x) : "memory"); \
> + break; \
> + default: \
> + atomic = 0; \
> + } \
> + atomic ? (typeof(*__x))__u.__val : (*(volatile typeof(__x))__x);\
I'm pretty sure that doesn't work the way you expect.
The ?: operator promotes 'unsigned char' to 'int'.
So you can fall foul of signedness tests (eg in min()).
It also isn't going to work for non-scalers.
Replacing the ?: with __builtin_choose_expr() may help.
(This is probably a bug in the code you copied.)
David
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Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)
next prev parent reply other threads:[~2024-04-08 14:51 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-02 1:47 [PATCH 1/3] arm64: Add TIF_POLLING_NRFLAG Haris Okanovic
2024-04-02 1:47 ` [PATCH 2/3] arm64: add __READ_ONCE_EX() Haris Okanovic
2024-04-02 16:48 ` Mark Rutland
2024-04-08 14:51 ` David Laight [this message]
2024-04-02 1:47 ` [PATCH 3/3] arm64: cpuidle: Add arm_poll_idle Haris Okanovic
2024-04-02 2:30 ` Okanovic, Haris
2024-04-02 17:23 ` Mark Rutland
2024-04-02 23:17 ` Ankur Arora
2024-04-05 19:36 ` Okanovic, Haris
2024-04-05 20:22 ` Ankur Arora
2024-04-05 20:05 ` Okanovic, Haris
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