From: Chen Pei <cp0613@linux.alibaba.com>
To: ast@kernel.org, daniel@iogearbox.net, andrii@kernel.org,
memxor@gmail.com, bjorn@kernel.org, puranjay@kernel.org
Cc: ihor.solodrai@linux.dev, eddyz87@gmail.com, martin.lau@linux.dev,
song@kernel.org, yonghong.song@linux.dev, jolsa@kernel.org,
emil@etsalapatis.com, pulehui@huawei.com, pjw@kernel.org,
palmer@dabbelt.com, shuah@kernel.org, guoren@kernel.org,
bpf@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH bpf-next v3 2/2] selftests/bpf: Enable arena LDSX tests for riscv64
Date: Wed, 19 Aug 2026 20:09:24 +0800 [thread overview]
Message-ID: <1bab696ec36f196fa6ec74a0f056030b39730da7.1787140923.git.cp0613@linux.alibaba.com> (raw)
In-Reply-To: <cover.1787140923.git.cp0613@linux.alibaba.com>
Now that the riscv64 JIT supports signed arena loads
(BPF_PROBE_MEM32SX), enable the arena LDSX tests on riscv64:
add JIT disassembly assertions for arena_ldsx_disasm (arena base in
s7, add into t2, sign-extending lw/lh/lb loads) and run
arena_ldsx_exception and arena_ldsx_s8/s16/s32 on riscv64.
Reviewed-by: Pu Lehui <pulehui@huawei.com>
Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
---
.../testing/selftests/bpf/progs/verifier_ldsx.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/tools/testing/selftests/bpf/progs/verifier_ldsx.c b/tools/testing/selftests/bpf/progs/verifier_ldsx.c
index 41340877dc9d..ed0a0f159bc1 100644
--- a/tools/testing/selftests/bpf/progs/verifier_ldsx.c
+++ b/tools/testing/selftests/bpf/progs/verifier_ldsx.c
@@ -286,6 +286,19 @@ __jited("add x11, x0, x28")
__jited("ldrsh x22, [x11, #0x18]")
__jited("add x11, x0, x28")
__jited("ldrsb x22, [x11, #0x20]")
+__arch_riscv64
+__jited("add t2, a5, s7")
+__jited("lw s3, 0x10(t2)")
+__jited("add t2, a5, s7")
+__jited("lh s3, 0x18(t2)")
+__jited("add t2, a5, s7")
+__jited("lb s3, 0x20(t2)")
+__jited("add t2, a0, s7")
+__jited("lw s4, 0x10(t2)")
+__jited("add t2, a0, s7")
+__jited("lh s4, 0x18(t2)")
+__jited("add t2, a0, s7")
+__jited("lb s4, 0x20(t2)")
__naked void arena_ldsx_disasm(void *ctx)
{
asm volatile (
@@ -317,6 +330,7 @@ __description("Arena LDSX Exception")
__success __retval(0)
__arch_x86_64
__arch_arm64
+__arch_riscv64
__naked void arena_ldsx_exception(void *ctx)
{
asm volatile (
@@ -338,6 +352,7 @@ __description("Arena LDSX, S8")
__success __retval(-1)
__arch_x86_64
__arch_arm64
+__arch_riscv64
__naked void arena_ldsx_s8(void *ctx)
{
asm volatile (
@@ -369,6 +384,7 @@ __description("Arena LDSX, S16")
__success __retval(-1)
__arch_x86_64
__arch_arm64
+__arch_riscv64
__naked void arena_ldsx_s16(void *ctx)
{
asm volatile (
@@ -400,6 +416,7 @@ __description("Arena LDSX, S32")
__success __retval(-1)
__arch_x86_64
__arch_arm64
+__arch_riscv64
__naked void arena_ldsx_s32(void *ctx)
{
asm volatile (
--
2.50.1
next prev parent reply other threads:[~2026-08-19 12:09 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-19 12:09 [PATCH bpf-next v3 0/2] bpf, riscv: Add support for signed arena loads Chen Pei
2026-08-19 12:09 ` [PATCH bpf-next v3 1/2] " Chen Pei
2026-08-20 4:12 ` Pu Lehui
2026-08-19 12:09 ` Chen Pei [this message]
2026-08-20 4:12 ` [PATCH bpf-next v3 2/2] selftests/bpf: Enable arena LDSX tests for riscv64 Pu Lehui
2026-08-25 13:16 ` [PATCH bpf-next v3 0/2] bpf, riscv: Add support for signed arena loads Björn Töpel
2026-08-25 13:30 ` patchwork-bot+netdevbpf
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