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Thu, 16 Apr 2026 21:23:23 -0700 (PDT) X-Received: by 2002:a17:902:8308:b0:2ae:c529:a13f with SMTP id d9443c01a7336-2b5f9eb2249mr8309025ad.14.1776399802903; Thu, 16 Apr 2026 21:23:22 -0700 (PDT) Received: from [10.92.179.248] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b5fa9ff8d6sm4798705ad.1.2026.04.16.21.23.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Apr 2026 21:23:22 -0700 (PDT) Message-ID: <1badc187-1fc0-4eaa-90a2-52e7fa172dc0@oss.qualcomm.com> Date: Fri, 17 Apr 2026 09:53:18 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V3 1/2] ufs: core: Configure only active lanes during link To: Manivannan Sadhasivam Cc: James.Bottomley@hansenpartnership.com, martin.petersen@oracle.com, bvanassche@acm.org, shawn.lin@rock-chips.com, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, nitin.rawat@oss.qualcomm.com References: <20260414093135.660725-1-palash.kambar@oss.qualcomm.com> <20260414093135.660725-2-palash.kambar@oss.qualcomm.com> Content-Language: en-US From: Palash Kambar In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: 8yzCfZ_FytpObDAxxwndeN8aXg2Vmv69 X-Authority-Analysis: v=2.4 cv=XNoAjwhE c=1 sm=1 tr=0 ts=69e1b5bc cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=Db-oeYxN4i5GQM4S5YAA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-ORIG-GUID: 8yzCfZ_FytpObDAxxwndeN8aXg2Vmv69 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE3MDA0MCBTYWx0ZWRfX+znkD3pSdkSr LJ+upYXFcF2JUyGDrjByfBP9Uci1T6zjyvH6IxSY0jydAQOuAoaCvmJt4bW/J7OYDTnqNveteHW MOyR5Hr2oz52xwaUJgf9OnPh3Kt0i1dNgDPlsj9VWk/SVh1aMk891fp1wId649ZcZYv6t4HlVNx 9Ua1u8BNdmTVZykmGh4Ccd7bpqjjpY4njitMEtG469KN7mU7WL1uZp3V3sbX8SjeEAHD+BjKpSX OZiivcHqT84x+CGV7/LUeMzrzqCDjOt/azJyG4JqDV4iojq3i60EeWs5jkGajttfOlGYI/qPnAr hHMKAMV4N0Ktwz2in3cffVUNugls5H2d5kI7PCGqALz8UDoF/KGI8jxkHZMAduxn3k/xOkH5afv bUgl3I1AWXII2BG3vzgPy8SnIJXCSmgqVc9sbO64vyfullHo6rUVFzwn97OCvBuYMjg+6SjyAwD POu3Y2pF7uI2jnHLr6g== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_04,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 priorityscore=1501 suspectscore=0 spamscore=0 phishscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604170040 On 4/16/2026 4:42 PM, Manivannan Sadhasivam wrote: > On Tue, Apr 14, 2026 at 03:01:34PM +0530, palash.kambar@oss.qualcomm.com wrote: >> From: Palash Kambar >> >> The number of connected lanes detected during UFS link startup can be >> fewer than the lanes specified in the device tree. The current driver >> logic attempts to configure all lanes defined in the device tree, >> regardless of their actual availability. This mismatch may cause >> failures during power mode changes. >> >> Hence, Add a check during link startup to ensure that only the lanes >> actually discovered are considered valid. If a mismatch is detected, >> fail the initialization early, preventing the driver from entering >> an unsupported configuration that could cause power mode transition >> failures. >> >> Signed-off-by: Palash Kambar >> --- >> drivers/ufs/core/ufshcd.c | 37 +++++++++++++++++++++++++++++++++++++ >> 1 file changed, 37 insertions(+) >> >> diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c >> index 31950fc51a4c..754bf4df3016 100644 >> --- a/drivers/ufs/core/ufshcd.c >> +++ b/drivers/ufs/core/ufshcd.c >> @@ -5035,6 +5035,38 @@ void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val) >> } >> EXPORT_SYMBOL_GPL(ufshcd_update_evt_hist); >> >> +static int ufshcd_validate_link_params(struct ufs_hba *hba) >> +{ >> + int ret; >> + int val; > > ret, val > >> + >> + ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), >> + &val); >> + if (ret) >> + goto out; >> + >> + if (val != hba->lanes_per_direction) { >> + dev_err(hba->dev, "Tx lane mismatch [config,reported] [%d,%d]\n", >> + hba->lanes_per_direction, val); >> + ret = -ENOLINK; >> + goto out; >> + } >> + >> + ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES), >> + &val); >> + if (ret) >> + goto out; >> + >> + if (val != hba->lanes_per_direction) { >> + dev_err(hba->dev, "Rx lane mismatch [config,reported] [%d,%d]\n", >> + hba->lanes_per_direction, val); >> + ret = -ENOLINK; > > goto out; > >> + } >> + > > return 0; > >> +out: >> + return ret; >> +} >> + >> /** >> * ufshcd_link_startup - Initialize unipro link startup >> * @hba: per adapter instance >> @@ -5108,6 +5140,11 @@ static int ufshcd_link_startup(struct ufs_hba *hba) >> goto out; >> } >> >> + /* Check successfully detected lanes */ > > Drop the comment. Will update as per suggestion. Thanks. >