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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Jie Gan <jie.gan@oss.qualcomm.com>,
	Mike Leach <mike.leach@arm.com>,
	James Clark <james.clark@linaro.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Tingwei Zhang <tingwei.zhang@oss.qualcomm.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v15 2/7] coresight: tmc: add create/clean functions for etr_buf_list
Date: Tue, 17 Mar 2026 11:01:16 +0000	[thread overview]
Message-ID: <1c4ab892-6f01-40ff-83e2-9060aa69616f@arm.com> (raw)
In-Reply-To: <20260313-enable-byte-cntr-for-ctcu-v15-2-1777f14ed319@oss.qualcomm.com>

On 13/03/2026 09:02, Jie Gan wrote:
> Introduce functions for creating and inserting or removing the
> etr_buf_node to/from the etr_buf_list.
> 
> The byte-cntr functionality requires two etr_buf to receive trace data.
> The active etr_buf collects the trace data from source device, while the
> byte-cntr reading function accesses the deactivated etr_buf after is
> has been filled and synced, transferring data to the userspace.
> 
> Reviewed-by: Mike Leach <mike.leach@linaro.org>
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
>   drivers/hwtracing/coresight/coresight-tmc-core.c |   1 +
>   drivers/hwtracing/coresight/coresight-tmc-etr.c  | 108 +++++++++++++++++++++++
>   drivers/hwtracing/coresight/coresight-tmc.h      |  17 ++++
>   3 files changed, 126 insertions(+)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwtracing/coresight/coresight-tmc-core.c
> index c89fe996af23..bac3278ef4dd 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-core.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c
> @@ -835,6 +835,7 @@ static int __tmc_probe(struct device *dev, struct resource *res)
>   		idr_init(&drvdata->idr);
>   		mutex_init(&drvdata->idr_mutex);
>   		dev_list = "tmc_etr";
> +		INIT_LIST_HEAD(&drvdata->etr_buf_list);
>   		break;
>   	case TMC_CONFIG_TYPE_ETF:
>   		desc.groups = coresight_etf_groups;
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> index 4dc1defe27a5..fdf23e1c932f 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> @@ -1918,6 +1918,114 @@ const struct coresight_ops tmc_etr_cs_ops = {
>   	.panic_ops	= &tmc_etr_sync_ops,
>   };
>   
> +/**
> + * tmc_clean_etr_buf_list - clean the etr_buf_list.
> + * @drvdata:	driver data of the TMC device.
> + *
> + * Remove unused buffers from @drvdata->etr_buf_list and free them.
> + */
> +void tmc_clean_etr_buf_list(struct tmc_drvdata *drvdata)
> +{
> +	struct etr_buf_node *nd, *next;
> +	unsigned long flags;
> +
> +	lockdep_assert_held(&drvdata->spinlock);
> +	list_for_each_entry_safe(nd, next, &drvdata->etr_buf_list, link) {
> +		if (nd->sysfs_buf == drvdata->sysfs_buf) {
> +			if (coresight_get_mode(drvdata->csdev) != CS_MODE_DISABLED) {
> +				/*
> +				 * Dont free the sysfs_buf, just remove it from list.
> +				 * drvdata->sysfs_buf will hold the buffer and free it later.
> +				 */
> +				nd->sysfs_buf = NULL;
> +				list_del(&nd->link);
> +				kfree(nd);
> +				continue;
> +			}
> +		}
> +		/* Free allocated buffers which are not utilized by ETR */
> +		raw_spin_unlock_irqrestore(&drvdata->spinlock, flags);

This is dangerous ! Restoring the irqflags to an uninitialised value 
from a different function thant where it was locked. Please clean this up

Suzuki


> +		tmc_etr_free_sysfs_buf(nd->sysfs_buf);
> +		raw_spin_lock_irqsave(&drvdata->spinlock, flags);
> +		drvdata->sysfs_buf = NULL;
> +		nd->sysfs_buf = NULL;
> +		list_del(&nd->link);
> +		kfree(nd);
> +	}
> +}
> +EXPORT_SYMBOL_GPL(tmc_clean_etr_buf_list);
> +
> +/**
> + * tmc_create_etr_buf_list - create a list to manage the etr_buf_node.
> + * @drvdata:	driver data of the TMC device.
> + * @num_nodes:	number of nodes want to create with the list.
> + *
> + * Return 0 upon success and return the error number if fail.
> + */
> +int tmc_create_etr_buf_list(struct tmc_drvdata *drvdata, int num_nodes)
> +{
> +	struct etr_buf_node *new_node;
> +	struct etr_buf *sysfs_buf;
> +	unsigned long flags;
> +	int i = 0, ret = 0;
> +
> +	lockdep_assert_held(&drvdata->spinlock);
> +	/* We dont need a list if there is only one node */
> +	if (num_nodes < 2)
> +		return -EINVAL;
> +
> +	/* We expect that sysfs_buf in drvdata has already been allocated. */
> +	if (drvdata->sysfs_buf) {
> +		raw_spin_unlock_irqrestore(&drvdata->spinlock, flags);
> +		/* Directly insert the allocated sysfs_buf into the list first */
> +		new_node = kzalloc_obj(*new_node, GFP_KERNEL);
> +		if (IS_ERR(new_node))
> +			return PTR_ERR(new_node);
> +
> +		raw_spin_lock_irqsave(&drvdata->spinlock, flags);
> +		new_node->sysfs_buf = drvdata->sysfs_buf;
> +		new_node->is_free = false;
> +		list_add(&new_node->link, &drvdata->etr_buf_list);
> +		i++;
> +	}
> +
> +	raw_spin_unlock_irqrestore(&drvdata->spinlock, flags);
> +	while (i < num_nodes) {
> +		new_node = kzalloc_obj(*new_node, GFP_KERNEL);
> +		if (IS_ERR(new_node)) {
> +			ret = PTR_ERR(new_node);
> +			break;
> +		}
> +
> +		sysfs_buf = tmc_alloc_etr_buf(drvdata, drvdata->size, 0, cpu_to_node(0), NULL);
> +		if (IS_ERR(sysfs_buf)) {
> +			kfree(new_node);
> +			ret = PTR_ERR(sysfs_buf);
> +			break;
> +		}
> +
> +		/* We dont have a available sysfs_buf in drvdata, setup one */
> +		if (!drvdata->sysfs_buf) {
> +			drvdata->sysfs_buf = sysfs_buf;
> +			new_node->is_free = false;
> +		} else
> +			new_node->is_free = true;
> +
> +		new_node->sysfs_buf = sysfs_buf;
> +		list_add(&new_node->link, &drvdata->etr_buf_list);
> +		i++;
> +	}
> +
> +	/* Clean the list if there is an error */
> +	if (ret)
> +		tmc_clean_etr_buf_list(drvdata);
> +
> +	raw_spin_lock_irqsave(&drvdata->spinlock, flags);
> +
> +	return ret;
> +}
> +EXPORT_SYMBOL_GPL(tmc_create_etr_buf_list);
> +
>   int tmc_read_prepare_etr(struct tmc_drvdata *drvdata)
>   {
>   	int ret = 0;
> diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
> index 319a354ede9f..81237944b986 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc.h
> +++ b/drivers/hwtracing/coresight/coresight-tmc.h
> @@ -208,6 +208,19 @@ struct tmc_resrv_buf {
>   	s64		len;
>   };
>   
> +/**
> + * @sysfs_buf:	Allocated sysfs_buf.
> + * @is_free:	Indicates whether the buffer is free to choose.
> + * @pos:	Position of the buffer.
> + * @link:	list_head of the node.
> + */
> +struct etr_buf_node {
> +	struct etr_buf		*sysfs_buf;
> +	bool			is_free;
> +	loff_t			pos;
> +	struct list_head	link;
> +};
> +
>   /**
>    * struct tmc_drvdata - specifics associated to an TMC component
>    * @atclk:	optional clock for the core parts of the TMC.
> @@ -245,6 +258,7 @@ struct tmc_resrv_buf {
>    *		(after crash) by default.
>    * @crash_mdata: Reserved memory for storing tmc crash metadata.
>    *		 Used by ETR/ETF.
> + * @etr_buf_list: List that is used to manage allocated etr_buf.
>    */
>   struct tmc_drvdata {
>   	struct clk		*atclk;
> @@ -275,6 +289,7 @@ struct tmc_drvdata {
>   	struct etr_buf		*perf_buf;
>   	struct tmc_resrv_buf	resrv_buf;
>   	struct tmc_resrv_buf	crash_mdata;
> +	struct list_head        etr_buf_list;
>   };
>   
>   struct etr_buf_operations {
> @@ -447,5 +462,7 @@ struct etr_buf *tmc_etr_get_buffer(struct coresight_device *csdev,
>   				   enum cs_mode mode,
>   				   struct coresight_path *path);
>   extern const struct attribute_group coresight_etr_group;
> +void tmc_clean_etr_buf_list(struct tmc_drvdata *drvdata);
> +int tmc_create_etr_buf_list(struct tmc_drvdata *drvdata, int num_nodes);
>   
>   #endif
> 


  parent reply	other threads:[~2026-03-17 11:01 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-13  9:02 [PATCH v15 0/7] coresight: ctcu: Enable byte-cntr function for TMC ETR Jie Gan
2026-03-13  9:02 ` [PATCH v15 1/7] coresight: core: refactor ctcu_get_active_port and make it generic Jie Gan
2026-03-13  9:02 ` [PATCH v15 2/7] coresight: tmc: add create/clean functions for etr_buf_list Jie Gan
2026-03-17  8:43   ` kernel test robot
2026-03-17 11:01   ` Suzuki K Poulose [this message]
2026-03-18  1:06     ` Jie Gan
2026-03-13  9:02 ` [PATCH v15 3/7] coresight: tmc: introduce tmc_sysfs_ops to wrap sysfs read operations Jie Gan
2026-03-13  9:02 ` [PATCH v15 4/7] coresight: etr: add a new function to retrieve the CTCU device Jie Gan
2026-03-13  9:02 ` [PATCH v15 5/7] dt-bindings: arm: add an interrupt property for Coresight CTCU Jie Gan
2026-03-13  9:02 ` [PATCH v15 6/7] coresight: ctcu: enable byte-cntr for TMC ETR devices Jie Gan
2026-03-17 10:10   ` kernel test robot
2026-03-13  9:02 ` [PATCH v15 7/7] arm64: dts: qcom: lemans: add interrupts to CTCU device Jie Gan

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