From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751748AbdLFL1l (ORCPT ); Wed, 6 Dec 2017 06:27:41 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:60318 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751362AbdLFL1j (ORCPT ); Wed, 6 Dec 2017 06:27:39 -0500 Subject: Re: [PATCH 2/3] arm64: dts: rockchip: add usb3-phy phandle for dwc3. To: =?UTF-8?Q?Heiko_St=c3=bcbner?= Cc: MyungJoo Ham , Chanwoo Choi , Lee Jones , Rob Herring , dianders@google.com, groeck@chromium.org, briannorris@google.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org References: <20171206111008.3079-1-enric.balletbo@collabora.com> <20171206111008.3079-2-enric.balletbo@collabora.com> <1756641.7q7fHBPi13@diego> From: Enric Balletbo i Serra Message-ID: <1c672b68-5f7f-e8ec-e5a9-901d4b53e2ad@collabora.com> Date: Wed, 6 Dec 2017 12:27:34 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <1756641.7q7fHBPi13@diego> Content-Type: text/plain; charset=utf-8 Content-Language: en-GB Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Heiko, On 06/12/17 12:20, Heiko Stübner wrote: > Am Mittwoch, 6. Dezember 2017, 12:10:07 CET schrieb Enric Balletbo i Serra: >> This patch adds the usb3-phy for both of the two dwc3 controllers on >> rk3399. > > This patch adds quite a bit more than the phy phandles though. > > The powerdomain addition should definitly be a separate patch > and the usb3-grf clock as well. > Ok, I'll split these parts and send in a separate patch in v2. Thanks for the feedback. Enric > > Heiko > > >> Signed-off-by: Enric Balletbo i Serra >> --- >> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 28 ++++++++++++++++++++-------- >> 1 file changed, 20 insertions(+), 8 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi >> b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 17e5e1a..c18ff88 100644 >> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi >> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi >> @@ -397,9 +397,11 @@ >> #size-cells = <2>; >> ranges; >> clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>, >> - <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>; >> + <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>, >> + <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>; >> clock-names = "ref_clk", "suspend_clk", >> - "bus_clk", "grf_clk"; >> + "bus_clk", "aclk_usb3_rksoc_axi_perf", >> + "aclk_usb3", "grf_clk"; >> status = "disabled"; >> >> usbdrd_dwc3_0: dwc3 { >> @@ -407,14 +409,15 @@ >> reg = <0x0 0xfe800000 0x0 0x100000>; >> interrupts = ; >> dr_mode = "otg"; >> - phys = <&u2phy0_otg>; >> - phy-names = "usb2-phy"; >> + phys = <&u2phy0_otg>, <&tcphy0_usb3>; >> + phy-names = "usb2-phy", "usb3-phy"; >> phy_type = "utmi_wide"; >> snps,dis_enblslpm_quirk; >> snps,dis-u2-freeclk-exists-quirk; >> snps,dis_u2_susphy_quirk; >> snps,dis-del-phy-power-chg-quirk; >> snps,dis-tx-ipgap-linecheck-quirk; >> + power-domains = <&power RK3399_PD_USB3>; >> status = "disabled"; >> }; >> }; >> @@ -425,9 +428,11 @@ >> #size-cells = <2>; >> ranges; >> clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>, >> - <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_GRF>; >> + <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_RKSOC_AXI_PERF>, >> + <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>; >> clock-names = "ref_clk", "suspend_clk", >> - "bus_clk", "grf_clk"; >> + "bus_clk", "aclk_usb3_rksoc_axi_perf", >> + "aclk_usb3", "grf_clk"; >> status = "disabled"; >> >> usbdrd_dwc3_1: dwc3 { >> @@ -435,14 +440,15 @@ >> reg = <0x0 0xfe900000 0x0 0x100000>; >> interrupts = ; >> dr_mode = "otg"; >> - phys = <&u2phy1_otg>; >> - phy-names = "usb2-phy"; >> + phys = <&u2phy1_otg>, <&tcphy1_usb3>; >> + phy-names = "usb2-phy", "usb3-phy"; >> phy_type = "utmi_wide"; >> snps,dis_enblslpm_quirk; >> snps,dis-u2-freeclk-exists-quirk; >> snps,dis_u2_susphy_quirk; >> snps,dis-del-phy-power-chg-quirk; >> snps,dis-tx-ipgap-linecheck-quirk; >> + power-domains = <&power RK3399_PD_USB3>; >> status = "disabled"; >> }; >> }; >> @@ -991,6 +997,12 @@ >> clocks = <&cru HCLK_SDIO>; >> pm_qos = <&qos_sdioaudio>; >> }; >> + pd_usb3@RK3399_PD_USB3 { >> + reg = ; >> + clocks = <&cru ACLK_USB3>; >> + pm_qos = <&qos_usb_otg0>, >> + <&qos_usb_otg1>; >> + }; >> pd_vio@RK3399_PD_VIO { >> reg = ; >> #address-cells = <1>; > >