From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0A12C43381 for ; Sun, 3 Mar 2019 07:49:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5982B2070B for ; Sun, 3 Mar 2019 07:49:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="nNZcDVT7" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726181AbfCCHtO (ORCPT ); Sun, 3 Mar 2019 02:49:14 -0500 Received: from mail-pl1-f193.google.com ([209.85.214.193]:41424 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725877AbfCCHtO (ORCPT ); Sun, 3 Mar 2019 02:49:14 -0500 Received: by mail-pl1-f193.google.com with SMTP id y5so1015374plk.8; Sat, 02 Mar 2019 23:49:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rgWDXyitkPfkOwvJZbjg9H8+KzeLJbUpGMI+NATW6JM=; b=nNZcDVT7gCmLRW7btBJZFuhEeXBszPuLxdF8l527tPJJvZzbH8EJ7oJjGevImyvnRW 2+wiyoWqjJ2C0n8E4rNzV5FTVYDDG+jtLD4kMgCMUKHdGlSSU09QcjVqNrJKLVYYZtNF GsRLhXw9pZuFnUOsOId3pCKdSYebF4mSr/N+RFQC49dl3jws1kfLZJ7FY2b2PhjXwWUz 3fN+jRnqXM0BTZNXPSL7Cfb5z9i68NoNK1sUNupcoums7hrj9u5WvUVW1Kvkut34EG26 P9uPYUUkqpFNSfNWNHsHvBl3ZW8eWikPU/n/ukLFIIfykDLFA5TlbtWYTBrYfousPQVI l5zw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rgWDXyitkPfkOwvJZbjg9H8+KzeLJbUpGMI+NATW6JM=; b=n6xoQ7K0OJ5E0AGajHmDMxgM4y4zVdTftOKeHXSuz9QCb9LW9w3cLl+zlpNMyCHb92 BVFkoOGDNa8tLGlUu2wg7AMbWZbuUqYtdDSQBp7AVo08+mk0dzExpQmWAUEhlUE9ipYb aEpIN0cy3Kyj44HufTe4rIhh26g1wfo1mCk7zGnUpRhHnSKUMw9oU1Wl39TzLAU8N1ny ake+S3ugO4dZb71u1JoK62Gzammz4RxfO+p2aX9wD1zpxCZLGxcY1HXEOSkBjzRIdz1V wKQ41QRPhlMc4bTnne9pJRRsDAgu8CJrqp3kt/mS5/Pw/W+rSg/ICSicztgk1181rmYx qfyA== X-Gm-Message-State: APjAAAU7VASu/BIszM/Jve5gU5aGjIXqZ/opyj0546+Gj80JUdAhWcEv qcxI/M5I3V/BpgR6gtowMgo= X-Google-Smtp-Source: APXvYqyoWyflno0hUvYm4dF/b+uTzDFho/HKq9iiGjwE0w/mIEL/ab2t65dLHqBHIRpgu/3Xup3Z+g== X-Received: by 2002:a17:902:7e49:: with SMTP id a9mr13482396pln.303.1551599352826; Sat, 02 Mar 2019 23:49:12 -0800 (PST) Received: from localhost.localdomain ([2001:268:c0a5:3b5c:c70:4af9:86e2:2]) by smtp.gmail.com with ESMTPSA id u24sm3606943pfm.140.2019.03.02.23.49.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 02 Mar 2019 23:49:12 -0800 (PST) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: akpm@linux-foundation.org, linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, andriy.shevchenko@linux.intel.com, linux@rasmusvillemoes.dk, yamada.masahiro@socionext.com, bgolaszewski@baylibre.com, linux-arm-kernel@lists.infradead.org, William Breathitt Gray Subject: [PATCH v9 5/9] gpio: gpio-mm: Utilize for_each_set_clump8 macro Date: Sun, 3 Mar 2019 16:50:01 +0900 Message-Id: <1caa420858570551283e6ac76ff6f52b3338a17b.1551598603.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump8 macro to simplify code and improve clarity. Reviewed-by: Linus Walleij Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-gpio-mm.c | 73 +++++++++++-------------------------- 1 file changed, 22 insertions(+), 51 deletions(-) diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c index 8c150fd68d9d..4c1037a005ab 100644 --- a/drivers/gpio/gpio-gpio-mm.c +++ b/drivers/gpio/gpio-gpio-mm.c @@ -172,46 +172,26 @@ static int gpiomm_gpio_get(struct gpio_chip *chip, unsigned int offset) return !!(port_state & mask); } +static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); - size_t i; - static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + unsigned int offset; + unsigned long gpio_mask; + const unsigned int ngpio = ARRAY_SIZE(ports) * 8; + unsigned int port_addr; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ - port_state = inb(gpiommgpio->base + ports[i]); + for_each_set_clump8(offset, gpio_mask, mask, ngpio) { + port_addr = gpiommgpio->base + ports[offset / 8]; + port_state = inb(port_addr) & gpio_mask; - /* store acquired bits at respective bits array offset */ - bits[word_index] |= (port_state << word_offset) & word_mask; + bitmap_set_value8(bits, ngpio, port_state, offset); } return 0; @@ -242,37 +222,28 @@ static void gpiomm_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int out_port; + unsigned int offset; + unsigned long gpio_mask; + const unsigned int ngpio = ARRAY_SIZE(ports) * 8; + size_t index; + unsigned int port_addr; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } + for_each_set_clump8(offset, gpio_mask, mask, ngpio) { + index = offset / 8; + port_addr = gpiommgpio->base + ports[index]; - port = i / gpio_reg_size; - out_port = (port > 2) ? port + 1 : port; - bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)]; + bitmask = bitmap_get_value8(bits, ngpio, offset) & gpio_mask; spin_lock_irqsave(&gpiommgpio->lock, flags); /* update output state data and set device gpio register */ - gpiommgpio->out_state[port] &= ~mask[BIT_WORD(i)]; - gpiommgpio->out_state[port] |= bitmask; - outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port); + gpiommgpio->out_state[index] &= ~gpio_mask; + gpiommgpio->out_state[index] |= bitmask; + outb(gpiommgpio->out_state[index], port_addr); spin_unlock_irqrestore(&gpiommgpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } -- 2.21.0