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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-36ac1fe6df3sm9243334a91.2.2026.05.27.02.24.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 27 May 2026 02:24:55 -0700 (PDT) Message-ID: <1cd587f0-d571-4bd8-a8c0-97248e732cec@oss.qualcomm.com> Date: Wed, 27 May 2026 17:24:51 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] dt-bindings: ufs: Document static TX Equalization settings properties To: Manivannan Sadhasivam Cc: bvanassche@acm.org, beanhuo@micron.com, peter.wang@mediatek.com, martin.petersen@oracle.com, linux-scsi@vger.kernel.org, Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ram Kumar Dwivedi , Zhaoming Luo , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list References: <20260523134711.323425-1-can.guo@oss.qualcomm.com> <20260523134711.323425-2-can.guo@oss.qualcomm.com> <96962564-ff25-4d81-a605-3d9c05fa000a@oss.qualcomm.com> Content-Language: en-US From: Can Guo In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: ukauKaJhLCDV8HOm25o8xntZvjveqcMS X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTI3MDA5MCBTYWx0ZWRfX8+nldgRV9bfD P1s2YNU6YncwN7cdfbvXN9kKhCcM1Eya5bmEJDV/lE8x91BYBelwa+/oM+N9EsSxw8x+LxTW0Y9 92jT1a6MV6FKXCySsiwZF3/SDhIer8oNugmfWITw6HeHNiV85E7cYi8G8cCenvrPajaK/2erlme I2mKbAxUCHeUT4g3Y4+nrIwM6tlf25BZwjFzrEiU9jCVgabtg+kb7HyaXo3E3eJngXSb1X2FDKS mGRoTigwkSrHABpsKLXGX0QvxgTeoWPRyMh4gUK3WD95aOa4USxgaXpdcaySr0H2xKPmIia8UtC L9OX3LVPLLRSWhsxenE3DQZB2oyES1NAdOA47mo/jhfsoZi5rJUXBbnMLrEPimFnQhbEdz7RQ8q FyLmuKR284ITcMcp022Ms0hwXIisf9AeHiHWrTibRvC29EY28yViD7ZxLWF5NdaBkHW07CpXTmt H+HEjIDXNXItkqMhq/g== X-Authority-Analysis: v=2.4 cv=I95Vgtgg c=1 sm=1 tr=0 ts=6a16b869 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=YG64nluAAAAA:20 a=7UmM63-barXJ9Uf7px8A:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 a=bA3UWDv6hWIuX7UZL3qL:22 X-Proofpoint-GUID: ukauKaJhLCDV8HOm25o8xntZvjveqcMS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-05-27_01,2026-05-26_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 lowpriorityscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605270090 On 5/27/2026 5:15 PM, Manivannan Sadhasivam wrote: > On Wed, May 27, 2026 at 04:51:04PM +0800, Can Guo wrote: >> Hi Mani, >> >> On 5/23/2026 10:14 PM, Manivannan Sadhasivam wrote: >>> On Sat, May 23, 2026 at 06:47:10AM -0700, Can Guo wrote: >>>> UFS v5.0/UFSHCI v5.0 add HS-G6 support (46.6 Gbps/lane) via UniPro v3.0 >>>> and M-PHY v6.0. In these specs, TX Equalization is defined for all High >>>> Speed Gears (not only HS-G6) to compensate channel loss and improve signal >>>> integrity at high speed operation. >>>> >>>> For HS-G6, M-PHY uses PAM4 1b1b line coding, Pre-Coding may also be >>>> required depending on channel characteristics. >>>> >>>> Add vendor-neutral DT patternProperties: >>>> txeq-settings-g[1-6] >>>> >>>> Each property is a uint32 array of per-lane tuples: >>>> (PreShoot, DeEmphasis, PrecodeEn) >>>> >>> I don't think combining all EQ settings (PreShoot, DeEmphasis, PrecodeEn) in a >>> single property as opaque tuples is the right approach. These are three >>> semantically distinct parameters with independent value ranges. So packing >>> them into a uint32 array makes validation impossible in the schema. >>> >>> AFACIS, PrecodeEn is applicable only to HS-G6 (PAM4), but the proposed >>> patternProperties forces it into G1-G5 tuples as well, which is semantically >>> wrong. >> Point taken for the PrecodeEn. >>> PCIe binding defines one property per data rate for EQ presets: >>> https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/pci/pci-bus-common.yaml#L193 >>> >>> Similarly, UFS should define one property per gear per (like, txeq-preshoot-g6, >>> txeq-deemphasis-g6, txeq-precode-enable-g6,...) rather than clubbing everything >>> into opaque tuples. >> Thanks for the suggestion. I will go with below approach: >> >> txeq-preshoot-g6 = > 1 PreShoot, Device Lane 1 PreShoot>; >> txeq-deemphasis-g6 = > Lane 1 DeEmphasis, Device Lane 1 DeEmphasis>; >> txeq-precode-en-g6 = > Lane 1 PrecodeEn, Device Lane 1 PrecodeEn>; >> > How about encoding Host and Device values in a single tuple. Like, > > txeq-preshoot-g6 = , , Man, I don't like that way to be honest, it took me a few minutes to understand it on the PCIe side... Let's go with my approach please... Thanks, Can Guo. > > - Mani >