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Tue, 16 Dec 2025 09:40:11 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ThreadId: AgGhHji4LWAw Date: Tue, 16 Dec 2025 15:39:51 +0100 From: "Arnd Bergmann" To: "Geert Uytterhoeven" Cc: "Linus Torvalds" , soc@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Message-Id: <1ce00594-66ce-4fa7-b75a-d26dc756541e@app.fastmail.com> In-Reply-To: References: <334684ec-5796-47a4-b9f4-96c60f449634@app.fastmail.com> <52068d9c-d677-4fa6-8ced-6a7fb190a935@app.fastmail.com> Subject: Re: [GIT PULL 3/6] soc: devicetree updates for 6.19 Content-Type: text/plain Content-Transfer-Encoding: 7bit On Tue, Dec 16, 2025, at 15:35, Geert Uytterhoeven wrote: > On Fri, 5 Dec 2025 at 19:28, Arnd Bergmann wrote: >> Three new SoCs got added in existing arm64 chip families: >> >> - Renesas R-Car X5H (R8A78000) is a new generation of automotive SoCs, >> based on 16 Cortex-A720 (Armv9.2) cores, which makes the the currently >> highest-perforance embedded SoC. > > Actually 32 Cortex-A720AE cores, which I believe could indeed reduce to > 16 cores when enabling dual-core lock-step mode. > Sorry about that, I should have looked more closely. Arnd