From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E238C22154B; Wed, 10 Sep 2025 11:26:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757503567; cv=none; b=Iklu2hrT1rq0Cynb3jVtcKfDA7CfrgXSxs41TI/rG9FwxZYIujUcXnhtqjL0nGwudsfdmMzCijMKmp/pgMbrdFj+6XOq1NKSS241wxiIFLKqsvHftfyL111orCEmNrhKE0TZASxLJXZfXPQyajCDyh26kIlgdO50fXi+EZvyegU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757503567; c=relaxed/simple; bh=TZMvfa368RsPUvS6M2AShyMJSs2hC6M0axiTcI5ZotI=; h=Date:From:To:CC:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=ltlFVOpWFW3+lTCgnd/ruUyO0ka+Yo+4cqjEF8G8Tlz9/i7jByAGNj6NhiYAWi+63NKiB7mJyy2X451J5HLvwsHT+Dy59Z72Ea96+Y6UI/JGUqVGsK9Z5FXLSlz3sFvrYAPMcFCLBOsxSgtO5dnxUAeCbno3QIpBJMIgsVZjMJU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=W3Faza0Y; arc=none smtp.client-ip=198.47.19.246 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="W3Faza0Y" Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTP id 58ABPvEL502951; Wed, 10 Sep 2025 06:25:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757503557; bh=zW1z095MzZSMk9KdimsOw/oibgooKAru9daqRXooKa0=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=W3Faza0YcYqDbWrsC2D4EtsnXFRMX04q2tJS23pZf28T8w/pX69f+K01l3JmFzo5G ZtWoKR3q2G9VdWXOoJcgPrurodGRJLvWoavz4blsSgfSD/N5QEaOJAbC8mZRgi+WsO vNSk6hgMeI2F5KIhqmvLq4iMM0DpiNFH/i7wBJJA= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 58ABPv8M246816 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 10 Sep 2025 06:25:57 -0500 Received: from DLEE214.ent.ti.com (157.170.170.117) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 10 Sep 2025 06:25:56 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE214.ent.ti.com (157.170.170.117) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Wed, 10 Sep 2025 06:25:56 -0500 Received: from localhost (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58ABPtMv102183; Wed, 10 Sep 2025 06:25:55 -0500 Date: Wed, 10 Sep 2025 16:55:54 +0530 From: s-vadapalli To: Akashdeep Kaur CC: , , , , , , , , , , , , , , , , Subject: Re: [PATCH v6 1/4] arm64: dts: ti: k3-am62p5-sk: Remove the unused cfg in USB1_DRVVBUS Message-ID: <1d16775c-fb7b-4e7e-a48b-31fd48d3bdf0@ti.com> References: <20250909044108.2541534-1-a-kaur@ti.com> <20250909044108.2541534-2-a-kaur@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20250909044108.2541534-2-a-kaur@ti.com> X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea On Tue, Sep 09, 2025 at 10:11:05AM +0530, Akashdeep Kaur wrote: > After the SoC has entered the DeepSleep low power mode, USB1 can be used > to wakeup the SoC based on USB events triggered by USB devices. This > requires that the pin corresponding to the Type-A connector remains pulled > up even after the SoC has entered the DeepSleep low power mode. > For that, either DeepSleep pullup configuration can be selected or the pin > can have the same configuration that it had when SoC was in active mode. > Remove the unnecessary DeepSleep state configuration from USB1_DRVBUS pin, > as the DeepSleep control bit is not set and the active configuration is > sufficient to keep the pin pulled up. This simplifies the setup and removes > redundant configuration. > > This reverts commit 115290c112952db27009668aa7ae2f29920704f0. > > Tested-by: Kendall Willis > Reviewed-by: Dhruva Gole > Signed-off-by: Akashdeep Kaur Acked-by: Siddharth Vadapalli Regards, Siddharth.