From: Robin Murphy <robin.murphy@arm.com>
To: Will Deacon <will.deacon@arm.com>
Cc: joro@8bytes.org, thunder.leizhen@huawei.com,
iommu@lists.linux-foundation.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linuxarm@huawei.com,
guohanjun@huawei.com, huawei.libin@huawei.com,
john.garry@huawei.com
Subject: Re: [PATCH v8 5/7] iommu/arm-smmu-v3: Add support for non-strict mode
Date: Fri, 28 Sep 2018 13:26:00 +0100 [thread overview]
Message-ID: <1d2b57f7-be4e-39c5-4981-7f8e2f601b6a@arm.com> (raw)
In-Reply-To: <20180928121900.GB1577@brain-police>
On 28/09/18 13:19, Will Deacon wrote:
> On Thu, Sep 20, 2018 at 05:10:25PM +0100, Robin Murphy wrote:
>> From: Zhen Lei <thunder.leizhen@huawei.com>
>>
>> Now that io-pgtable knows how to dodge strict TLB maintenance, all
>> that's left to do is bridge the gap between the IOMMU core requesting
>> DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE for default domains, and showing the
>> appropriate IO_PGTABLE_QUIRK_NON_STRICT flag to alloc_io_pgtable_ops().
>>
>> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
>> [rm: convert to domain attribute, tweak commit message]
>> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
>> ---
>>
>> v8:
>> - Use nested switches for attrs
>> - Document barrier semantics
>>
>> drivers/iommu/arm-smmu-v3.c | 79 ++++++++++++++++++++++++++-----------
>> 1 file changed, 56 insertions(+), 23 deletions(-)
>>
>> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
>> index f10c852479fc..db402e8b068b 100644
>> --- a/drivers/iommu/arm-smmu-v3.c
>> +++ b/drivers/iommu/arm-smmu-v3.c
>> @@ -612,6 +612,7 @@ struct arm_smmu_domain {
>> struct mutex init_mutex; /* Protects smmu pointer */
>>
>> struct io_pgtable_ops *pgtbl_ops;
>> + bool non_strict;
>>
>> enum arm_smmu_domain_stage stage;
>> union {
>> @@ -1407,6 +1408,12 @@ static void arm_smmu_tlb_inv_context(void *cookie)
>> cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid;
>> }
>>
>> + /*
>> + * NOTE: when io-pgtable is in non-strict mode, we may get here with
>> + * PTEs previously cleared by unmaps on the current CPU not yet visible
>> + * to the SMMU. We are relying on the DSB implicit in queue_inc_prod()
>> + * to guarantee those are observed before the TLBI. Do be careful, 007.
>> + */
>
> Good, so you can ignore my comment on the previous patch :)
Well, I suppose that comment in io-pgtable *could* have explicitly noted
that same-CPU order is dealt with elsewhere - feel free to fix it up if
you think it would be a helpful reminder for the future.
Cheers,
Robin.
next prev parent reply other threads:[~2018-09-28 12:26 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-20 16:10 [PATCH v8 0/7] Add non-strict mode support for iommu-dma Robin Murphy
2018-09-20 16:10 ` [PATCH v8 1/7] iommu/arm-smmu-v3: Implement flush_iotlb_all hook Robin Murphy
2018-09-20 16:10 ` [PATCH v8 2/7] iommu/dma: Add support for non-strict mode Robin Murphy
2018-09-20 16:10 ` [PATCH v8 3/7] iommu: Add "iommu.strict" command line option Robin Murphy
2018-09-28 12:51 ` Will Deacon
2018-09-28 14:25 ` Robin Murphy
2018-09-20 16:10 ` [PATCH v8 4/7] iommu/io-pgtable-arm: Add support for non-strict mode Robin Murphy
2018-09-28 12:17 ` Will Deacon
2018-09-20 16:10 ` [PATCH v8 5/7] iommu/arm-smmu-v3: " Robin Murphy
2018-09-28 12:19 ` Will Deacon
2018-09-28 12:26 ` Robin Murphy [this message]
2018-09-28 12:47 ` Will Deacon
2018-09-28 13:55 ` Will Deacon
2018-09-28 14:01 ` Robin Murphy
2018-09-20 16:10 ` [PATCH v8 6/7] iommu/io-pgtable-arm-v7s: " Robin Murphy
2018-09-20 16:10 ` [PATCH v8 7/7] iommu/arm-smmu: Support " Robin Murphy
2018-09-21 9:20 ` [PATCH v8 0/7] Add non-strict mode support for iommu-dma John Garry
2018-09-21 9:29 ` Robin Murphy
2018-09-21 11:03 ` Robin Murphy
2018-09-24 14:35 ` John Garry
2018-09-28 13:36 ` Will Deacon
2018-09-28 13:42 ` Robin Murphy
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