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Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [Patch v5 2/4] memory: tegra: Add MC error logging on tegra186 onward Content-Language: en-US To: Dmitry Osipenko , Dmitry Osipenko , krzysztof.kozlowski@canonical.com, robh+dt@kernel.org, thierry.reding@gmail.com, jonathanh@nvidia.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Cc: vdumpa@nvidia.com, Snikam@nvidia.com References: <20220316092525.4554-1-amhetre@nvidia.com> <20220316092525.4554-3-amhetre@nvidia.com> <9ab1a77c-82e6-39be-9b90-b394037fb574@gmail.com> <4ea801f4-7929-148d-4e69-d4126a9dfbf7@collabora.com> <44235c65-160c-04c7-294d-16b13d25605c@nvidia.com> <06174428-edb1-6478-1b2c-ede83c4bfa87@nvidia.com> From: Ashish Mhetre In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: MAXPR0101CA0047.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:d::33) To SA0PR12MB4349.namprd12.prod.outlook.com (2603:10b6:806:98::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3141544f-df40-48d4-e697-08da136122c2 X-MS-TrafficTypeDiagnostic: DM5PR12MB1913:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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>> >> *mc_channel = __ffs((status & mc->soc->ch_intmask) >> >> mc->soc->status_reg_chan_shift); >> >> return 0; >> } >> >> Correct? > > Yes > >>>> Also we want to handle interrupts on one channel at a time and then >>>> clear it from status register. There can be interrupts on multiple >>>> channel. So multiple bits from status will be set. Hence it will be >>>> hard to parameterize shift such that it gives appropriate channel. >>>> So I think current approach is fine. Please correct me if I am wrong >>>> somewhere. >>> >>> You may do the following: >>> >>> 1. find the first channel bit set in the status reg >>> 2. handle that channel >>> 3. clear only the handled status bit, don't clear the other bits >>> 4. return from interrupt >>> >>> If there are other bits set, then interrupt handler will fire again and >>> next channel will be handled. >> >> For clearing status bit after handling, we can retrieve channel bit by >> something like this: >> >> ch_bit = BIT(*mc_channel) << mc->soc->status_reg_chan_shift; >> >> Correct? > > Yes > > Perhaps using FIELD_PREP() and alike helpers could make it look nice in > the code. I tried using FIELD_PREP() and FIELD_GET() for our use-case but compilation is failing because these macros require the mask to be compile time constant and our mask "mc->soc->ch_intmask" cannot qualify to be compile time constant.