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From: Marek Vasut <marek.vasut@gmail.com>
To: Alexandru Gagniuc <alex.g@adaptrum.com>,
	linux-snps-arc@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: David Woodhouse <dwmw2@infradead.org>,
	Brian Norris <computersforpeace@gmail.com>,
	Boris Brezillon <boris.brezillon@free-electrons.com>,
	Richard Weinberger <richard@nod.at>,
	Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	linux-mtd@lists.infradead.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 4/5] mtd: spi-nor: Add driver for Adaptrum Anarion QSPI controller
Date: Tue, 1 Aug 2017 00:43:41 +0200	[thread overview]
Message-ID: <1da97744-bc02-420e-d4e9-5ebf331475e8@gmail.com> (raw)
In-Reply-To: <e1390c36-086b-aeba-848c-f45dcb88b5ce@adaptrum.com>

On 08/01/2017 12:20 AM, Alexandru Gagniuc wrote:
> On 07/31/2017 02:33 PM, Marek Vasut wrote:
>> On 07/31/2017 07:17 PM, Alexandru Gagniuc wrote:
> 
> Hi Marek,
> 
> Thank you again for your feedback. I've applied a majority of your
> suggestions, and I am very happy with the result. I should have v2
> posted within a day or so.

No. You should have v2 out in about a week or so after people have time
to review v1 some more.

> [snip]
>>>>> +/*
>>>>> + * This mask does not match reality. Get over it:
>>>>
>>>> What is this about ?
>>>
>>> Each stage of the QSPI chain has two registers. The second register has
>>> a bitfield which takes in the length of the stage. For example, for
>>> DATA2, we can set the length up to 0x4000, but for ADDR2, we can only
>>> set a max of 4 bytes. I wrote this comment as a reminder to myself to be
>>> careful about using this mask. I'll rephrase the comment for [v2]
>>
>> Please do.
>>
> Staged for [PATCH v2]
> 
>>>>> + * DATA2:    0x3fff
>>>>> + * CMD2:    0x0003
>>>>> + * ADDR2:    0x0007
>>>>> + * PERF2:    0x0000
>>>>> + * HI_Z:    0x003f
>>>>> + * BCNT:    0x0007
>>>>> + */
>>>>> +#define CHAIN_LEN(x)        ((x - 1) & ASPI_DATA_LEN_MASK)

btw parenthesis around (x) missing, although this is like GEN_MASK() or
something here ...

>>>>> +struct anarion_qspi {
>>>>> +    struct        spi_nor nor;
>>>>> +    struct        device *dev;
>>>>> +    uintptr_t    regbase;
>>>>
>>>> Should be void __iomem * I guess ?
>>>
>>> I chose uintptr_t as opposed to void *, because arithmetic on void * is
>>> not valid in C. What is the right answer hen, without risking undefined
>>> behavior?
>>
>> What sort of arithmetic ? It's perfectly valid in general ...
> 
> ISO/IEC 9899:201x, Section 6.5.6, constraint(2) is not met when the one
> of the operands to addition is a void pointer.
> Section 6.2.5 (19) defines void to be an incomplete type.

Is that something new in C 201x draft ? Anyway, this would mean half of
the drivers are broken, so I'm not convinced.

> [snip]
> 
>>>> Is this stuff below something like ioread32_rep() ?
>>>>
>>>>> +    aspi_write_reg(aspi, ASPI_REG_BYTE_COUNT, sizeof(uint32_t));
>>>>> +    while (len >= 4) {
>>>>> +        data = aspi_read_reg(aspi, ASPI_REG_DATA1);
>>>>> +        memcpy(buf, &data, sizeof(data));
>>>>> +        buf += 4;
>>>>> +        len -= 4;
>>>>> +    }
>>>
>>> That is very similar to ioread32_rep, yes. I kept this as for the
>>> reasons outlined above, but changing this to _rep() seems innocent
>>> enough.
>>
>> What reason ?
> 
> Being able to share the code between the different codebases where it is
> used.

Yes, that argument isn't gonna work, it'd make things impossible to
maintain in the kernel.

-- 
Best regards,
Marek Vasut

  reply	other threads:[~2017-07-31 22:44 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-28 22:07 [PATCH 0/5] Initial support for Adaptrum Anarion SOC Alexandru Gagniuc
2017-07-28 22:07 ` [PATCH 1/5] of: Add vendor prefix for Adaptrum, Inc Alexandru Gagniuc
2017-07-29 14:48   ` Andreas Färber
2017-08-03 23:25     ` Rob Herring
2017-07-28 22:07 ` [PATCH 2/5] ARC: [plat-anarion] Add early boot workarounds for Anarion SOC Alexandru Gagniuc
2017-08-04 20:03   ` [PATCH v2 1/2] " Alexandru Gagniuc
2017-08-04 20:03     ` [PATCH v2 2/2] ARC: DTS: Add device-tree for Anarion-based development board Alexandru Gagniuc
2017-07-28 22:07 ` [PATCH 3/5] net: stmmac: Add Adaptrum Anarion GMAC glue layer Alexandru Gagniuc
2017-07-29  2:01   ` David Miller
2017-07-31 15:11     ` Alex
2017-08-03 23:22       ` Rob Herring
2017-08-03 23:26   ` Rob Herring
2017-07-28 22:07 ` [PATCH 4/5] mtd: spi-nor: Add driver for Adaptrum Anarion QSPI controller Alexandru Gagniuc
2017-07-29  9:34   ` Marek Vasut
2017-07-31 17:17     ` Alexandru Gagniuc
2017-07-31 21:33       ` Marek Vasut
2017-07-31 22:20         ` Alexandru Gagniuc
2017-07-31 22:43           ` Marek Vasut [this message]
2017-07-31 22:59             ` Alexandru Gagniuc
2017-08-04 20:14             ` [PATCH v2 6/7] " Alexandru Gagniuc
2017-08-04 20:14               ` [PATCH v2 7/7] dt-bindings: Add documentation for adaptrum,anarion-quadspi Alexandru Gagniuc
2017-07-31 20:54     ` [PATCH 4/5] mtd: spi-nor: Add driver for Adaptrum Anarion QSPI controller Alexandru Gagniuc
2017-07-31 21:35       ` Marek Vasut
2017-07-29 19:03   ` kbuild test robot
2017-07-28 22:07 ` [PATCH 5/5] ARC: DTS: Add device-tree for Anarion-based development board Alexandru Gagniuc
2017-07-31  6:32   ` Vineet Gupta
2017-07-31 15:08     ` Alex

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