From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C5CCC88CB9 for ; Tue, 13 Jun 2023 04:31:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238695AbjFMEa6 (ORCPT ); Tue, 13 Jun 2023 00:30:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51510 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240558AbjFMEai (ORCPT ); Tue, 13 Jun 2023 00:30:38 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id CB8F04215 for ; Mon, 12 Jun 2023 21:27:32 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 081661FB; Mon, 12 Jun 2023 21:27:23 -0700 (PDT) Received: from [10.162.42.9] (unknown [10.162.42.9]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 77E0B3F587; Mon, 12 Jun 2023 21:26:34 -0700 (PDT) Message-ID: <1dca7ec8-a0d1-3038-7e9f-0d2934dc2e37@arm.com> Date: Tue, 13 Jun 2023 09:56:31 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH V2 14/14] arm64/sysreg: Convert TRBIDR_EL1 register to automatic generation Content-Language: en-US To: Mark Brown Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org References: <20230602062552.565992-1-anshuman.khandual@arm.com> <20230602062552.565992-15-anshuman.khandual@arm.com> <4de1ec32-f07b-4eca-99e2-f71a08f5cd5b@sirena.org.uk> From: Anshuman Khandual In-Reply-To: <4de1ec32-f07b-4eca-99e2-f71a08f5cd5b@sirena.org.uk> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/2/23 17:42, Mark Brown wrote: > On Fri, Jun 02, 2023 at 11:55:52AM +0530, Anshuman Khandual wrote: >> This converts TRBIDR_EL1 register to automatic generation without >> causing any functional change. > >> +Sysreg TRBIDR_EL1 3 0 9 11 7 >> +Res0 63:12 >> +Field 11:8 EA > > EA is another field which looks like it should be an enum, as with the > others this shouldn't be a blocker and could be done incrementally. Will fold the following changes in this patch. --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2267,7 +2267,11 @@ EndSysreg Sysreg TRBIDR_EL1 3 0 9 11 7 Res0 63:12 -Field 11:8 EA +Enum 11:8 EA + 0b0000 NON_DESC + 0b0001 IGNORE + 0b0010 SERROR +EndEnum Res0 7:6 Field 5 F Field 4 P > >> +Res0 7:6 >> +Field 5 F >> +Field 4 P >> +Field 3:0 Align > > Align arguably too though really it's just encoding the relevant power > of 2 with the enum coming from the fact that it's limited to at most 2KB > alignment so a Field may well make more sense. Can fold the following changes in this patch (if required) unless the Field looks better than Enum. --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2275,5 +2275,18 @@ EndEnum Res0 7:6 Field 5 F Field 4 P -Field 3:0 Align +Enum 3:0 Align + 0b0000 BYTE + 0b0001 HALF_WORD + 0b0010 WORD + 0b0011 DOUBLE_WORD + 0b0100 16_BYTES + 0b0101 32_BYTES + 0b0110 64_BYTES + 0b0111 128_BYTES + 0b1000 156_BYTES + 0b1001 512_BYTES + 0b1010 1_KB + 0b1011 2_KB +EndEnum EndSysreg > > Reviewed-by: Mark Brown