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Wed, 10 Jun 2026 02:49:26 -0700 (PDT) X-Received: by 2002:a05:6a00:2305:b0:842:6155:45d0 with SMTP id d2e1a72fcca58-842b10d9659mr24913568b3a.43.1781084965977; Wed, 10 Jun 2026 02:49:25 -0700 (PDT) Received: from [10.151.37.217] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84282220d1bsm25722217b3a.12.2026.06.10.02.49.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 10 Jun 2026 02:49:25 -0700 (PDT) Message-ID: <1df97802-0956-4d2b-97f1-0c1570d0c3d7@oss.qualcomm.com> Date: Wed, 10 Jun 2026 15:19:20 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] regulator: qcom-refgen: add support for the IPQ9650 SoC To: Konrad Dybcio , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20260602-ipq9650_refgen-v1-0-55e2afa5ff64@oss.qualcomm.com> <20260602-ipq9650_refgen-v1-2-55e2afa5ff64@oss.qualcomm.com> Content-Language: en-US From: Kathiravan Thirumoorthy In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: ggxx_2O28O_DxvJGjsQUcwdixjcLwPA1 X-Authority-Analysis: v=2.4 cv=ebYNubEH c=1 sm=1 tr=0 ts=6a293327 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=cPk82LopJyZTTbnMm5cA:9 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-ORIG-GUID: ggxx_2O28O_DxvJGjsQUcwdixjcLwPA1 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjEwMDA5MyBTYWx0ZWRfXzDDIf4nLHaJe FbwQPQA8proVRSZ4nF71XXum37zZwlwCNzpiwMdnWHXTSFYvo+qVUQi0q2SkJ73wLt7LuR8dJtj KXeAYER5kHgiA2otCjNC9hJgH3OdwHvXNyFSUpmHrmxarg/jgzR5kBSwX0SK6mG/eZ0qSExEFzT bHuQ2aHOexYRClacjdXFl0S4NRzi1cDxMt9zdLcKQsWrHKyI9DwAqmCNsLpPVSFJBXyTD55jQVR /mKFyo/RE3+D95eAEI+JhfVcL5ErIGNsQAhze0fUyBcuTCTHjEAk2VyeXHngkiLopQzQP3au2Dt nBj6XCGqxC4Y6gY3QHoQ6r17Q2DgQ8EpNyUByXxgs76ELppx1Aj9ivYyqz4LY2nnp5OWNNQEWgH AUUOIJbbzI8C9NKg0frT2eqJqw/VNUyx1fZxfMhu1AigNa0zKfRPNrnm1/vJLPfSummpQIXMpFW wrYhoxv+xb6Xo2pE6yA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-10_02,2026-06-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 spamscore=0 bulkscore=0 clxscore=1015 suspectscore=0 phishscore=0 adultscore=0 lowpriorityscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606100093 On 6/9/2026 7:18 PM, Konrad Dybcio wrote: > On 6/2/26 11:22 AM, Kathiravan Thirumoorthy wrote: >> IPQ9650 SoC has 2 REFGEN blocks providing the reference current to the >> PCIe and USB, UNIPHY PHYs. For the other SoCs, clocks for this block is >> enabled on power up but that's not the case for IPQ9650 and we have to >> enable those clocks explicitly to bring up the PHYs properly. >> >> As per the design team, REFGEN block provides the reference current. >> Hence marked the regulator type as REGULATOR_CURRENT. >> >> Signed-off-by: Kathiravan Thirumoorthy >> --- > I'm slightly confused. Is there no register programming needed? Yeah, no programming is needed. Similar to Kodiak, PHYs in IPQ9650 does the HW votes. No SW vote is needed. > Can we at least retrieve the running state in .is_enabled() by reading > some value? Based on the discussion with IP team, I can use the REFGEN_STATUS register. Let me update the is_enabled() to query this information. > > Konrad