From: Mukesh Ojha <quic_mojha@quicinc.com>
To: <agross@kernel.org>, <andersson@kernel.org>,
<konrad.dybcio@linaro.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>
Cc: <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/2] arm64: dts: qcom: sm8450: Add TCSR halt register space
Date: Thu, 12 Jan 2023 14:23:18 +0530 [thread overview]
Message-ID: <1e891742-dfe5-a6bb-df61-2b72c4badfa1@quicinc.com> (raw)
In-Reply-To: <1673513501-29938-1-git-send-email-quic_mojha@quicinc.com>
This is a mistake, please ignore this patch.
Very sorry for the spam.
-Mukesh
On 1/12/2023 2:21 PM, Mukesh Ojha wrote:
> Add TCSR register space and refer it from scm node, so that
> it can be used by SCM driver.
>
> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 5704750..e0fa733 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -270,6 +270,7 @@
> firmware {
> scm: scm {
> compatible = "qcom,scm-sm8450", "qcom,scm";
> + qcom,dload-mode = <&tcsr 0x13000>;
> interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
> #reset-cells = <1>;
> };
> @@ -1986,6 +1987,11 @@
> #hwlock-cells = <1>;
> };
>
> + tcsr: syscon@1fc0000 {
> + compatible = "syscon";
> + reg = <0x0 0x1fc0000 0x0 0x30000>;
> + };
> +
> usb_1_hsphy: phy@88e3000 {
> compatible = "qcom,sm8450-usb-hs-phy",
> "qcom,usb-snps-hs-7nm-phy";
prev parent reply other threads:[~2023-01-12 8:55 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-12 8:51 Mukesh Ojha
2023-01-12 8:53 ` Mukesh Ojha [this message]
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