From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751318AbdAWONt (ORCPT ); Mon, 23 Jan 2017 09:13:49 -0500 Received: from foss.arm.com ([217.140.101.70]:44626 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751032AbdAWONm (ORCPT ); Mon, 23 Jan 2017 09:13:42 -0500 Subject: Re: [V2 2/2] arm64: dts: Add dts files for Hisilicon Hi3660 SoC To: Chen Feng , xuwei5@hisilicon.com, robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <1484034915-48879-1-git-send-email-puck.chen@hisilicon.com> <1484034915-48879-2-git-send-email-puck.chen@hisilicon.com> Cc: Sudeep Holla , puck.chen@foxmail.com, dan.zhao@hisilicon.com, suzhuangluan@hisilicon.com, saberlily.xia@hisilicon.com, xuyiping@hisilicon.com, qijiwen@hisilicon.com From: Sudeep Holla Organization: ARM Message-ID: <1f003ff0-656d-6d2f-20e3-9f9e7010e236@arm.com> Date: Mon, 23 Jan 2017 14:13:31 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.5.1 MIME-Version: 1.0 In-Reply-To: <1484034915-48879-2-git-send-email-puck.chen@hisilicon.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/01/17 07:55, Chen Feng wrote: > Add initial dtsi file to support Hisilicon Hi3660 SoC with > support of Octal core CPUs in two clusters(4 * A53 & 4 * A73). > > Also add dts file to support HiKey960 development board which > based on Hi3660 SoC. > The output console is earlycon "earlycon=pl011,0xfdf05000". > And the con_init uart5 with a fixed clock, which already > configured at bootloader. > > When clock is available, the uart5 will be modified. > > Tested on HiKey960 Board. > > Signed-off-by: Chen Feng > --- > arch/arm64/boot/dts/hisilicon/Makefile | 1 + > arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 34 +++++ > arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 156 ++++++++++++++++++++++ > 3 files changed, 191 insertions(+) > create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts > create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660.dtsi > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > new file mode 100644 > index 0000000..7f9805c > --- /dev/null > +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > @@ -0,0 +1,156 @@ > +/* > + * dts file for Hisilicon Hi3660 SoC > + * > + * Copyright (C) 2016, Hisilicon Ltd. > + */ > + > +#include > + > +/ { > + compatible = "hisilicon,hi3660"; > + interrupt-parent = <&gic>; > + #address-cells = <2>; > + #size-cells = <2>; > + > + psci { > + compatible = "arm,psci-0.2"; > + method = "smc"; > + }; [...] > + > + cpu0: cpu@0 { > + compatible = "arm,armv8"; You can add more specific compatibles as you mentioned this SoC contains Cortex A53 & A73. -- Regards, Sudeep