From: Andrew Lunn <andrew@lunn.ch>
To: Birger Koblitz <mail@birger-koblitz.de>
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
linux-usb@vger.kernel.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next v2 02/12] ax88179_178a: Add HW support for AX179A-based chips
Date: Wed, 15 Jul 2026 00:58:50 +0200 [thread overview]
Message-ID: <1f858852-8e8e-4cff-bbdc-eb6751f44ca5@lunn.ch> (raw)
In-Reply-To: <20260708-ax88179a-v2-2-0800fedb2e16@birger-koblitz.de>
> + /* Initialize MII structure */
> + dev->mii.dev = dev->net;
> + dev->mii.mdio_read = ax88179_mdio_read;
> + dev->mii.mdio_write = ax88179_mdio_write;
> + dev->mii.phy_id_mask = 0xff;
> + dev->mii.reg_num_mask = 0xff;
> + dev->mii.phy_id = 0x03;
> + if (!ax179_data->is_ax88772d)
> + dev->mii.supports_gmii = 1;
O.K, so you are keeping going.
I still think mii has to die, and you need to swap to phylink.
It is a bit ugly, but there is a way around the PHYs having a totally
different API, despite the same ID register values.
Some generation of Marvel Ethernet switches set the OUI part of the
PHY ID register, but left the product part as 0. They even documented
this was intentional. We worked around it by trapping reads to
registers 2 and 3, and filling in the missing information, using an ID
from the marvel range which was not in use. We could then make the
Marvell PHY driver do the right thing.
You can do the same here. Intercept the reads to registers 2 and 3,
and return a different ID. You can then extend the PHY driver.
Andrew
next prev parent reply other threads:[~2026-07-14 22:59 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-08 18:39 [PATCH net-next v2 00/12] ax88179_178a: Add support for AX88179A-based chips Birger Koblitz
2026-07-08 18:39 ` [PATCH net-next v2 01/12] ax88179_178a: Fix endianness of pause watermark register Birger Koblitz
2026-07-08 18:39 ` [PATCH net-next v2 02/12] ax88179_178a: Add HW support for AX179A-based chips Birger Koblitz
2026-07-14 22:58 ` Andrew Lunn [this message]
2026-07-16 14:54 ` Birger Koblitz
2026-07-16 15:42 ` Andrew Lunn
2026-07-08 18:39 ` [PATCH net-next v2 03/12] ax88179_178a: Add MMD accessor function for AX88179A Birger Koblitz
2026-07-08 18:39 ` [PATCH net-next v2 04/12] ax88179_178a: Add EEE HW configuration support " Birger Koblitz
2026-07-08 18:39 ` [PATCH net-next v2 05/12] ax88179_178a: Add support for 2500 link speed of AX88279 Birger Koblitz
2026-07-08 18:39 ` [PATCH net-next v2 06/12] ax88179_178a: EEE setup for AX88179A-based chips Birger Koblitz
2026-07-08 18:39 ` [PATCH net-next v2 07/12] ax88179_178a: Obtain speed and duplex from Interrupt URB Birger Koblitz
2026-07-08 18:39 ` [PATCH net-next v2 08/12] ax88179_178a: Add support for ethtool pause parameter configuration Birger Koblitz
2026-07-08 18:39 ` [PATCH net-next v2 09/12] ax88179_178a: Add VLAN offload support for AX88179A Birger Koblitz
2026-07-08 18:39 ` [PATCH net-next v2 10/12] ax88179_178a: Add ethtool get_drvinfo Birger Koblitz
2026-07-08 18:39 ` [PATCH net-next v2 11/12] ax88179_178a: Add support for AX88179A/772D/279 EEPROM access Birger Koblitz
2026-07-08 18:39 ` [PATCH net-next v2 12/12] ax88179_178a: Add AX179A/AX279 multicast configuration Birger Koblitz
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