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([2a02:810d:15c0:828:9e92:dca6:241d:71b6]) by smtp.gmail.com with ESMTPSA id q27-20020ac25a1b000000b004dc4d26c30dsm4946301lfn.63.2023.03.28.00.14.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Mar 2023 00:14:38 -0700 (PDT) Message-ID: <1f97dec8-d30c-ccc7-3026-713bf9a15850@linaro.org> Date: Tue, 28 Mar 2023 09:14:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH 1/2] dt-bindings: mmc: arasan,sdci: Add Xilinx Versal Net compatible Content-Language: en-US To: "Potthuri, Sai Krishna" , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Michal Simek , Adrian Hunter Cc: "linux-mmc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "git (AMD-Xilinx)" , "saikrishna12468@gmail.com" References: <20230324073630.3194724-1-sai.krishna.potthuri@amd.com> <20230324073630.3194724-2-sai.krishna.potthuri@amd.com> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 27/03/2023 11:58, Potthuri, Sai Krishna wrote: > Hi Krzysztof, > >> -----Original Message----- >> From: Krzysztof Kozlowski >> Sent: Friday, March 24, 2023 5:14 PM >> To: Potthuri, Sai Krishna ; Ulf Hansson >> ; Rob Herring ; Krzysztof >> Kozlowski ; Michal Simek >> ; Adrian Hunter >> Cc: linux-mmc@vger.kernel.org; linux-kernel@vger.kernel.org; >> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; git (AMD- >> Xilinx) ; saikrishna12468@gmail.com >> Subject: Re: [PATCH 1/2] dt-bindings: mmc: arasan,sdci: Add Xilinx Versal Net >> compatible >> >> On 24/03/2023 08:36, Sai Krishna Potthuri wrote: >>> Add Xilinx Versal Net compatible to support eMMC 5.1 PHY. >>> >>> Signed-off-by: Sai Krishna Potthuri >>> --- >>> Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml | 6 ++++++ >>> 1 file changed, 6 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml >>> b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml >>> index 8296c34cfa00..cf44a4b988a7 100644 >>> --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml >>> +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml >>> @@ -27,6 +27,7 @@ allOf: >>> enum: >>> - xlnx,zynqmp-8.9a >>> - xlnx,versal-8.9a >>> + - xlnx,versal-net-5.1-emmc >> >> v5.1 is eMMC standard or Versal block version? If the first, it's not suitable for >> compatibles. >> >> Also, what's the difference from xlnx,versal-8.9a? > V5.1 is an eMMC standard and this compatible is defined based on sdhci arasan > eMMC5.1 Host Controller(arasan,sdhci-5.1), where as in Versal, it’s a different > controller and it is based on 4.51 Host Controller(arasan,sdhci-8.9a). Mixing IP block versions and eMMC spec versions in one binding is a great way to confuse. > Versal Net Compatible is defined it this way to make it inline with the other > existing SoC compatibles like "intel,keembay-sdhci-5.1-emmc". > Please suggest if the compatible need to be renamed to "xlnx,versal-net-emmc"? Is Versal Net uniquely identifying your SoC or IP block? > > Regards > Sai Krishna > >> >>> then: >>> properties: >>> clock-output-names: >>> @@ -62,6 +63,11 @@ properties: >>> description: >>> For this device it is strongly suggested to include >>> clock-output-names and '#clock-cells'. >>> + - items: >>> + - const: xlnx,versal-net-5.1-emmc # Versal Net eMMC PHY You do not have items here, so move it to respective place at beginning, just like others are defined. Best regards, Krzysztof