From: Shanker R Donthineni <sdonthineni@nvidia.com>
To: Amey Narkhede <ameynarkhede03@gmail.com>,
Bjorn Helgaas <helgaas@kernel.org>
Cc: <alex.williamson@redhat.com>,
Raphael Norwitz <raphael.norwitz@nutanix.com>,
<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<kw@linux.com>, Sinan Kaya <okaya@kernel.org>,
Len Brown <lenb@kernel.org>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>
Subject: Re: [PATCH v7 2/8] PCI: Add new array for keeping track of ordering of reset methods
Date: Mon, 21 Jun 2021 10:02:11 -0500 [thread overview]
Message-ID: <1fb0a184-908c-5f98-ef6d-74edc602c2e0@nvidia.com> (raw)
In-Reply-To: <20210618172242.vs3qwimjpcicb4m4@archlinux>
Hi Bjorn,
On 6/18/21 12:22 PM, Amey Narkhede wrote:
> I wonder if this would be easier if dev->reset_methods[] contained
> indices into pci_reset_fn_methods[], highest priority first, with the
> priority being determined when dev->reset_methods[] is updated. For
> example:
>
> const struct pci_reset_fn_method pci_reset_fn_methods[] = {
> { }, # 0
> { &pci_dev_specific_reset, .name = "device_specific" }, # 1
> { &pci_dev_acpi_reset, .name = "acpi" }, # 2
> { &pcie_reset_flr, .name = "flr" }, # 3
> { &pci_af_flr, .name = "af_flr" }, # 4
> { &pci_pm_reset, .name = "pm" }, # 5
> { &pci_reset_bus_function, .name = "bus" }, # 6
> };
>
> dev->reset_methods[] = [1, 2, 3, 4, 5, 6]
> means all reset methods are supported, in the default priority
> order
>
> dev->reset_methods[] = [1, 0, 0, 0, 0, 0]
> means only pci_dev_specific_reset is supported
>
> dev->reset_methods[] = [3, 5, 0, 0, 0, 0]
> means pcie_reset_flr and pci_pm_reset are supported, in that
> priority order
What about keeping two bitmap fields 'resets_supported' and 'resets_enabled' in
pci_dev object and mange it through sysfs and probe helper function. We can avoid
two loops multiple paces and takes only 2Bytes of memory to keep track resets.
resets_supported ---> initialized during pci_dev setup
resets_enabled ---> Exposed to userspace through sysfs by default set to resets_supported
include/linux/pci.h:
------------------------
/* Different types of PCI resets possible, lower number is higher priority */
#define PCI_RESET_METHOD_DEVSPEC 0
#define PCI_RESET_METHOD_ACPI 1
#define PCI_RESET_METHOD_FLR 2
#define PCI_RESET_METHOD_Af_FLR 3
#define PCI_RESET_METHOD_PM 4
#define PCI_RESET_METHOD_BUS 5
#define PCI_RESET_METHOD_MAX 6
struct pci_dev {
...
u8 resets_supported;
u8 resets_enabled;
};
static inline bool pci_reset_supported(struct pci_dev *dev)
{
return !!(dev->resets_supported);
}
drivers/pci/pci.c:
--------------------
const struct pci_reset_fn_method pci_reset_fn_methods[PCI_RESET_METHOD_MAX] = {
[PCI_RESET_METHOD_DEVSPEC] = { &pci_dev_specific_reset,
.name = "device_specific" },
[PCI_RESET_METHOD_ACPI] = { &pci_dev_acpi_reset, .name = "acpi" },
[PCI_RESET_METHOD_FLR] = { &pcie_reset_flr, .name = "flr" },
[PCI_RESET_METHOD_Af_FLR] = { &pci_af_flr, .name = "af_flr" },
[PCI_RESET_METHOD_PM] = { &pci_pm_reset, .name = "pm" },
[PCI_RESET_METHOD_BUS] = { &pci_reset_bus_function, .name = "bus" }
};
void pci_init_reset_methods(struct pci_dev *dev)
{
int i, rc;
BUILD_BUG_ON(ARRAY_SIZE(pci_reset_fn_methods) != PCI_RESET_METHOD_MAX);
might_sleep();
for (i = 0; i < PCI_RESET_METHOD_MAX; i++) {
rc = pci_reset_fn_methods[i].reset_fn(dev, PCI_RESET_PROBE);
if (!rc)
dev->resets_supported |= BIT(i);
else if (rc != -ENOTTY)
break;
}
dev->resets_enabled = dev->resets_supported;
}
int __pci_reset_function_locked(struct pci_dev *dev)
{
int i, rc = -ENOTTY;
might_sleep();
for (i = 0; i < PCI_RESET_METHOD_MAX; i++) {
if (dev->resets_enabled & BIT(i)) {
rc = pci_reset_fn_methods[i].reset_fn(dev, 0);
if (rc != -ENOTTY)
return rc;
}
}
if (rc == -ENOTTY)
pci_warn(dev, "No reset happened reason %s\n",
!!dev->resets_supported ?
"disabled by user" : "not supported");
return rc;
}
drivers/pci/pci-sysfs.c
----------------------------
static ssize_t reset_method_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct pci_dev *pdev = to_pci_dev(dev);
u8 resets_enabled = 0;
...
if (sysfs_streq(options, "default")) {
pdev->resets_enabled = pdev->resets_supported;
goto set_reset_methods;
}
while ((name = strsep(&options, ",")) != NULL) {
if (sysfs_streq(name, ""))
continue;
name = strim(name);
for (i = 0; i < PCI_RESET_METHOD_MAX; i++) {
if ((pdev->resets_supported & BIT(i)) &&
sysfs_streq(name, pci_reset_fn_methods[i].name)) {
resets_enabled |= BIT(i);
break;
}
}
...
}
set_reset_methods:
kfree(options);
pdev->resets_enabled = resets_enabled;
return count;
}
static ssize_t reset_method_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct pci_dev *pdev = to_pci_dev(dev);
ssize_t len = 0;
int i;
for (i = 0; i < PCI_RESET_METHOD_MAX; i++) {
if (pdev->resets_enabled & BIT(i))
len += sysfs_emit_at(buf, len, "%s%s",
len ? "," : "",
pci_reset_fn_methods[i].name);
}
len += sysfs_emit_at(buf, len, len ? "\n" : "");
return len;
}
next prev parent reply other threads:[~2021-06-21 15:02 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-08 5:48 [PATCH v7 0/8] Expose and manage PCI device reset Amey Narkhede
2021-06-08 5:48 ` [PATCH v7 1/8] PCI: Add pcie_reset_flr to follow calling convention of other reset methods Amey Narkhede
2021-06-10 20:15 ` Shanker R Donthineni
2021-06-17 21:57 ` Bjorn Helgaas
2021-06-17 22:51 ` Alex Williamson
2021-06-18 16:32 ` Amey Narkhede
2021-06-24 12:23 ` Bjorn Helgaas
2021-06-24 15:28 ` Amey Narkhede
2021-06-24 16:15 ` Bjorn Helgaas
2021-06-24 18:48 ` Alex Williamson
2021-06-08 5:48 ` [PATCH v7 2/8] PCI: Add new array for keeping track of ordering of " Amey Narkhede
2021-06-10 20:15 ` Shanker R Donthineni
2021-06-17 23:13 ` Bjorn Helgaas
2021-06-18 17:22 ` Amey Narkhede
2021-06-21 15:02 ` Shanker R Donthineni [this message]
2021-06-21 17:15 ` Amey Narkhede
2021-06-21 18:37 ` Bjorn Helgaas
2021-06-08 5:48 ` [PATCH v7 3/8] PCI: Remove reset_fn field from pci_dev Amey Narkhede
2021-06-10 20:16 ` Shanker R Donthineni
2021-06-08 5:48 ` [PATCH v7 4/8] PCI/sysfs: Allow userspace to query and set device reset mechanism Amey Narkhede
2021-06-09 21:57 ` Raphael Norwitz
2021-06-09 22:36 ` Shanker R Donthineni
2021-06-09 22:48 ` Raphael Norwitz
2021-06-10 20:16 ` Shanker R Donthineni
2021-06-18 20:00 ` Bjorn Helgaas
2021-06-19 13:59 ` Amey Narkhede
2021-06-21 13:01 ` Bjorn Helgaas
2021-06-21 17:28 ` Amey Narkhede
2021-06-21 19:07 ` Bjorn Helgaas
2021-06-21 19:33 ` Amey Narkhede
2021-06-23 12:06 ` Bjorn Helgaas
2021-06-23 14:07 ` Amey Narkhede
2021-06-23 17:56 ` Amey Narkhede
2021-06-23 17:21 ` Alex Williamson
2021-06-24 12:15 ` Bjorn Helgaas
2021-06-24 15:12 ` Amey Narkhede
2021-06-24 16:56 ` Bjorn Helgaas
2021-06-24 17:20 ` Shanker R Donthineni
2021-06-24 17:28 ` Amey Narkhede
2021-06-24 17:59 ` Bjorn Helgaas
2021-06-08 5:48 ` [PATCH v7 5/8] PCI: Setup ACPI_COMPANION early Amey Narkhede
2021-06-08 5:48 ` [PATCH v7 6/8] PCI: Add support for ACPI _RST reset method Amey Narkhede
2021-06-08 5:48 ` [PATCH v7 7/8] PCI: Enable NO_BUS_RESET quirk for Nvidia GPUs Amey Narkhede
2021-06-10 23:16 ` Bjorn Helgaas
2021-06-10 23:33 ` Shanker R Donthineni
2021-06-10 23:43 ` Shanker R Donthineni
2021-06-10 23:53 ` Bjorn Helgaas
2021-06-11 4:15 ` Shanker R Donthineni
2021-06-08 5:48 ` [PATCH v7 8/8] PCI: Change the type of probe argument in reset functions Amey Narkhede
2021-06-09 21:40 ` Raphael Norwitz
2021-06-08 10:05 ` [PATCH v7 0/8] Expose and manage PCI device reset Enrico Weigelt, metux IT consult
2021-06-08 15:44 ` Amey Narkhede
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