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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-37a2678375fsm11760041a91.17.2026.06.15.02.02.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 15 Jun 2026 02:02:32 -0700 (PDT) Message-ID: <1fe8d286-7182-49ed-b6fc-dfa3766f851a@oss.qualcomm.com> Date: Mon, 15 Jun 2026 17:02:27 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 29/39] drm/msm/dp: add an API to initialize MST on sink side To: Dmitry Baryshkov Cc: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Jessica Zhang , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Abhinav Kumar References: <20260410-msm-dp-mst-v4-0-b20518dea8de@oss.qualcomm.com> <20260410-msm-dp-mst-v4-29-b20518dea8de@oss.qualcomm.com> <32jtwnkusxultvsgvnalrvccfkcyk7744yf4d42pqm7wudysvt@l4pnrzfxh2f4> Content-Language: en-US From: Yongxing Mou In-Reply-To: <32jtwnkusxultvsgvnalrvccfkcyk7744yf4d42pqm7wudysvt@l4pnrzfxh2f4> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: NOdqBM6lBxpRtn_MVkh00AD9po1j8uyD X-Proofpoint-ORIG-GUID: NOdqBM6lBxpRtn_MVkh00AD9po1j8uyD X-Proofpoint-Spam-Info: AW1haW4tMjYwNjE1MDA5NCBTYWx0ZWRfXxFWqlCuUNwEl sZnymAoAx2sGYjNZ94sgebmGtb2pBRuXVLH9AKeRfxtvC5PzGIU0LVZ4L9aDyPpoi2Xh65r9tcC /W1WMC8z6ZurFAEVtogR4rjQhg1B8jc= X-Authority-Analysis: v=2.4 cv=JLYLdcKb c=1 sm=1 tr=0 ts=6a2fbfaa cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=tepjUtBTXmVVZiRr_ggA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjE1MDA5NCBTYWx0ZWRfXznWPW69nvc76 JSkxJ19CDteizLHqJXW3MUiYTl8uKEBALhDvSbx83hJx4i5xU71hlYyHUWU1qinHuH8LxqUuttw ccRa7ciSgIX6yvJIzOnJpcu0iSqSt1ZL+V6y9q4Twsn9sJieV30fGaAmpo/GzPeX6jCtXETbAiG uGovsqY2sxTViP7fBUHJ+8zLiSPMZNxuzyLJYbxKegZp4CPda5OkAyFBlaKFMvwx0ojfsLazYJp pznx+Vx28XuL47hlnMO670n7NYMpED6ySOpxhqNWU16ag18waXnY1/fUh5nyj8dtMp0mm7sBrbd 4qpEphFFyvM1chFvF6pN7AcVMBn3hTG0Z3Qr71UZ8T7l4oFrQIsfwHje7Yk2i4eUrwMepSwEQVx rONYnTuR2mlBVEN4jNFvd4r/vJeaLjd+579AW2eAxLgAU8O4bqQphPRkWks30y3xvJZLIyYxQdH xt4jcS8gGoD1zfup7ew== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-15_02,2026-06-12_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 impostorscore=0 bulkscore=0 adultscore=0 malwarescore=0 phishscore=0 suspectscore=0 priorityscore=1501 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606040000 definitions=main-2606150094 On 4/12/2026 8:15 AM, Dmitry Baryshkov wrote: > On Fri, Apr 10, 2026 at 05:34:04PM +0800, Yongxing Mou wrote: >> From: Abhinav Kumar >> >> If the DP controller is capable of supporting multiple streams >> then initialize the DP sink in MST mode by programming the DP_MSTM_CTRL >> DPCD register to enable MST mode. >> >> Signed-off-by: Abhinav Kumar >> Signed-off-by: Yongxing Mou >> --- >> drivers/gpu/drm/msm/dp/dp_display.c | 57 ++++++++++++++++++++++++++++++++----- >> 1 file changed, 50 insertions(+), 7 deletions(-) >> >> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c >> index 8ae690ce2b9f..abf26951819a 100644 >> --- a/drivers/gpu/drm/msm/dp/dp_display.c >> +++ b/drivers/gpu/drm/msm/dp/dp_display.c >> @@ -14,6 +14,7 @@ >> #include >> #include >> #include >> +#include >> #include >> >> #include "msm_drv.h" >> @@ -270,6 +271,40 @@ static int msm_dp_display_lttpr_init(struct msm_dp_display_private *dp, u8 *dpcd >> return lttpr_count; >> } >> >> +static void msm_dp_display_mst_init(struct msm_dp_display_private *dp) >> +{ >> + const unsigned long clear_mstm_ctrl_timeout_us = 100000; >> + u8 old_mstm_ctrl; >> + struct msm_dp *msm_dp = &dp->msm_dp_display; >> + int ret; >> + >> + /* clear sink MST state */ >> + drm_dp_dpcd_read_byte(dp->aux, DP_MSTM_CTRL, &old_mstm_ctrl); >> + >> + ret = drm_dp_dpcd_write_byte(dp->aux, DP_MSTM_CTRL, 0); >> + if (ret < 0) { >> + DRM_ERROR("failed to clear DP_MSTM_CTRL, ret=%d\n", ret); >> + return; >> + } >> + >> + /* add extra delay if MST old state is on*/ >> + if (old_mstm_ctrl) { >> + drm_dbg_dp(dp->drm_dev, "wait %luus to set DP_MSTM_CTRL set 0\n", >> + clear_mstm_ctrl_timeout_us); >> + usleep_range(clear_mstm_ctrl_timeout_us, >> + clear_mstm_ctrl_timeout_us + 1000); > > For 100 ms you should be using msleep() instead. But where is that > timeout coming from? > Will switch to msleep(100). The 100 ms is an empirical workaround carried over from downstream — some sinks don't exit MST immediately after writing DP_MSTM_CTRL = 0, and re-enabling MST too quickly broke topology probe. It's not a DP spec requirement, and other drivers (drm_dp_mst core, i915, amdgpu, nouveau) don't have an equivalent delay. >> + } >> + >> + ret = drm_dp_dpcd_write_byte(dp->aux, DP_MSTM_CTRL, >> + DP_MST_EN | DP_UP_REQ_EN | DP_UPSTREAM_IS_SRC); > > Isn't it too early to enable MST? (I don't remember this part of the > standard). > No, this follows the DP 1.4a MST spec. DP_MSTM_CTRL must be set before topology discovery. Topology discovery uses AUX sideband messages, which don’t require link training. So we enable MST first, then discover topology, and only do link training and payload allocation later in atomic_enable(). >> + if (ret < 0) { >> + DRM_ERROR("sink MST enablement failed\n"); >> + return; >> + } >> + >> + msm_dp->mst_active = true; >> +} >> + >> static int msm_dp_display_process_hpd_high(struct msm_dp_display_private *dp) >> { >> struct drm_connector *connector = dp->msm_dp_display.connector; >> @@ -288,14 +323,19 @@ static int msm_dp_display_process_hpd_high(struct msm_dp_display_private *dp) >> if (rc) >> goto end; >> >> - drm_edid = drm_edid_read_ddc(connector, &dp->aux->ddc); >> - drm_edid_connector_update(connector, drm_edid); >> + if (!(dp->max_stream > 1) || !drm_dp_read_mst_cap(dp->aux, dp->panel->dpcd)) { >> + drm_edid = drm_edid_read_ddc(connector, &dp->aux->ddc); >> + drm_edid_connector_update(connector, drm_edid); >> >> - if (!drm_edid) { >> - DRM_ERROR("panel edid read failed\n"); >> - /* check edid read fail is due to unplug */ >> - if (!msm_dp_aux_is_link_connected(dp->aux)) >> - return -ETIMEDOUT; >> + if (!drm_edid) { >> + DRM_ERROR("panel edid read failed\n"); >> + /* check edid read fail is due to unplug */ >> + if (!msm_dp_aux_is_link_connected(dp->aux)) >> + return -ETIMEDOUT; >> + } >> + >> + if (rc) >> + goto end; >> } >> >> msm_dp_link_process_request(dp->link); >> @@ -317,6 +357,9 @@ static int msm_dp_display_process_hpd_high(struct msm_dp_display_private *dp) >> */ >> msm_dp_link_psm_config(dp->link, &dp->panel->link_info, false); >> >> + if (dp->max_stream > 1 && drm_dp_read_mst_cap(dp->aux, dp->panel->dpcd)) >> + msm_dp_display_mst_init(dp); >> + >> msm_dp_link_reset_phy_params_vx_px(dp->link); >> >> end: >> >> -- >> 2.43.0 >> >